參數(shù)資料
型號： S1D13700F02A100
元件分類： 顯示控制器
英文描述： 320 X 240 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP64
封裝： LEAD FREE, TQFP-64
文件頁數(shù)： 31/108頁
文件大?。?/td> 1373K
代理商： S1D13700F02A100
3: COMMANDS AND COMMAND REGISTERS
24
EPSON
S1D13700 Technical Manual
[Parameters P7, P8]
qAP
Denes the number of memory addresses in the X direction of a virtual screen.
qC
When this command is input, the S1D13700 blanks the display for at least a one-frame period,
then stops all internal operations including clock oscillation before entering sleep mode. At this
time, the LCD unit sends OFF data to the X driver while simultaneously sending the YDIS
signal to the Y driver to turn the bias voltage off. Therefore, in no case will unexpected display
remain on the screen when the liquid crystal is powered off by the YDIS signal.
In sleep mode, the S1D13700 registers retain the original state before entering sleep mode.
Moreover, the display memory control pins are xed high or low to maintain the integrity of
data stored in display memory.
To restore the S1D13700 from sleep mode, write the command and one parameter (P1) of the
SYSTEM SET to the S1D13700 once to immediately wake up the S1D13700. In direct
interface mode, the S1D13700 can be restored from sleep mode by clearing the SleepIn bit.
However, display memory cannot be accessed immediately after exiting sleep mode. The
display RAM space (0000h–7FFFh) can be accessed by rst accessing any other register once.
To restore display, execute the DISP ON command immediately after exiting sleep mode.
Regardless of whether the S1D13700 is directly or indirectly interfaced, the entire screen must
be set to the ON state before entering sleep mode. When in indirect interface mode, issue the
DISP ON command. When in direct interface mode, set the DispOn bit to 1 before entering
sleep mode.
Note: 1. The YDIS signal goes low at a time equivalent to one to two frames after the sleep command
is written. When the YDIS signal goes low, all Y driver outputs are forcibly brought to an inter-
HEX
Number of memory
addresses per line
[AP]
APH
APL
0 0
0 0
F F
0 0
0 1
5 0
F E
F F
0
1
80
216-2
216-1
SLEEP IN
APL
AP7
AP6
AP5
AP4
AP3
AP2
AP1
AP0
APH
AP15
AP14
AP13
AP12
AP11
AP10
AP9
AP8
D0
D1
D2
D3
D4
D5
D6
D7
MSB
LSB
Display screen
C/R
Defined area of display memory
AP
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
01010011
C
<Indirect mode>
<Direct mode>
Address
Register name
0x8008
r_SleepIn
bit0 : SleepIn
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