參數(shù)資料
型號： S1C88848D0A0100
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192
封裝： DIE-192
文件頁數(shù)： 68/174頁
文件大小： 1304K
代理商： S1C88848D0A0100
8
EPSON
S1C88848 TECHNICAL MANUAL
2 POWER SUPPLY
2POWER SUPPLY
In this section, we will explain the operating
voltage and the configuration of the internal power
supply circuit of the S1C88848.
2.1 Operating Voltage
The S1C88848 operating power voltage is as
follows:
VDD = 1.8 V to 5.5 V
Note, however, a supply voltage of less than 2.4 V
affects the LCD contrast. (See Note below.)
2.2 Internal Power Supply Circuit
The S1C88848 incorporates the power supply
circuit shown in Figure 2.2.1. When voltage within
the range described above is supplied to VDD (+)
and VSS (GND), all the voltages needed for the
internal circuit are generated internally in the IC.
Roughly speaking, the power supply circuit is
divided into two sections.
The internal logic voltage regulator generates the
operating voltage <VD1> for driving the internal
logic circuits and the OSC3 and OSC1 oscillation
circuits.
The LCD system power supply circuit generates the
LCD drive voltages <VC1> to <VC5>. In 1/5 bias
mode, VC1 is generated by halving VC2 output from
the LCD system voltage regulator and VC3 to VC5
are generated by boosting VC2. These five voltages
can be supplied from outside the IC by mask
option.
Furthermore, 1/4 bias drive can be selected by
mask option. In this case, the VC2 voltage level
becomes equal to the VC3 voltage level. When 1/4
bias is selected, VC2 to VC5 are generated by
boosting VC1.
See Chapter 7, "ELECTRICAL CHARACTERIS-
TICS" for the voltage values.
In the S1C88848, the LCD drive voltage is supplied
to the built-in LCD driver which drives the LCD
panel connected to the SEG and COM terminals.
Notes: Do not use the VC1–VC5 outputs for driving
external circuits.
When the supply voltage is 2.4 V or less
(VDD
≤ 2.4), the VC2 voltage generated is
almost the same as VDD. Since the VC2
voltage affects the LCD contrast, VDD
must be higher than 2.4 V to obtain stable
display quality.
In the 1/4 bias configuration, VC1 does not
exceed 1.4 V because VC2–VC5 voltages
are generated by boosting the VC1
voltage. Thus the supply voltage within the
range of 1.8–5.5 V does not affects the
LCD contrast in the 1/4 bias configuration.
Fig. 2.2.1 Configuration of power supply circuit
VDD
VD1
VC1
VC3
VC4
VC5
CA
CB
CC
CD
CE
CF
CG
VSS
VD1
VC1–VC5
VC2
OSC3, OSC4
OSC1, OSC2
COM0–COM15
COM16–COM31/SEG66–SEG51
SEG0–SEG50
*1
*2
1: N.C. when VC1 standard is selected
2: N.C. when VC2 standard is selected
External
power
supply
LCD system
power supply
circuit
Regulator
Booster/reducer
Internal logic
voltage regulator
LCD driver
OSC3
oscillation circuit
Internal voltage
setting circuit
Internal circuit
OSC1
oscillation circuit
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