參數(shù)資料
型號： S1C88848D0A0100
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192
封裝： DIE-192
文件頁數(shù)： 157/174頁
文件大?。?/td> 1304K
代理商： S1C88848D0A0100
S1C88848 TECHNICAL MANUAL
EPSON
75
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer)
■ 8/16-bit mode setting
By writing "0" to the 8/16-bit mode selection
register MODE160 (MODE162), timer 0 and timer 1
(timer 2 and timer 3) are set as independent timers
in 8-bit
× 2 channels. In this mode, timer 0 and
timer 1 (timer 2 and timer 3) can be controlled
individually and each of them operates independ-
ently.
On the other hand, when writing "1" to the register
MODE160 (MODE162), timer 0 and timer 1 (timer 2
and timer 3) are set as 1 channel 16-bit timer. This is
done by setting timer 0 (timer 2) to the lower 8 bits,
and timer 1 (timer 3) to the upper 8 bits. The timer
is controlled by the timer 0 (timer 2) registers. In
this case, the control registers for timer 1 (timer 3)
are invalid. (PRUN1 and PRUN3 are fixed at "0".)
8-bit data
High-order 8-bit data
[8-bit mode]
8-bit data
Timer 0
input
clock
Timer 1
input
clock
Interrupt
request
Interrupt
request
[16-bit mode]
Low-order 8-bit data
Timer 0
input
clock
Timer 0
underflow
signal
Interrupt
request
Timer 0
Timer 1
Timer 0
Timer 1
8-bit data
High-order 8-bit data
8-bit data
Timer 2
input
clock
Timer 3
input
clock
Interrupt
request
Interrupt
request
Low-order 8-bit data
MODE160 = "0"
MODE160 = "1"
MODE162 = "0"
MODE162 = "1"
Timer 2
input
clock
Timer 2
underflow
signal
Interrupt
request
Timer 2
Timer 3
Timer 2
Timer 3
Fig. 5.10.2.3 8/16-bit mode setting and counter configuration
5.10.3 Setting of input clock
A prescaler has been provided for each timer. The
prescaler generates the input clock for each timer
by dividing the source clock signal from the OSC1
or OSC3 oscillation circuit.
The source clock and the dividing ratio of the
prescaler can be selected individually for each timer
by software.
The input clocks are configured by the following
sequence.
(1) Selection of source clock
Select the source clock (OSC1 or OSC3) for each
prescaler. This is done using the source clock
selection register CKSELx: when "0" is written,
OSC1 is selected and when "1" is written, OSC3
is selected. When the 16-bit mode is selected,
the source clock is selected by the register
CKSEL0 (timer 0) or CKSEL2 (timer 2), and the
settings of the register CKSEL1 (timer 1) or
CKSEL3 (timer 3) becomes invalid.
When the OSC3 oscillation circuit is made the
clock source, it is necessary to turn the OSC3
oscillation ON, prior to using the programmable
timer.
From the time the OSC3 oscillation circuit is
turning ON until oscillation stabilizes, an
interval of several 100 sec to several 10 msec is
necessary. Consequently, you should allow an
adequate waiting time after turning the OSC3
oscillation circuit ON before starting the count
of the programmable timer. (The oscillation
start time will vary somewhat depending on the
oscillator and on external parts. Refer to the
oscillation start time example indicated in
Chapter 7, "ELECTRICAL CHARACTERIS-
TICS".)
At initial reset, OSC3 oscillation circuit is set to
ON status.
(2) Selection of prescaler dividing ratio
Select the dividing ratio of each prescaler from
among 4 types. This selection is done by the
prescaler dividing ratio selection register
PSCx0/PSCx1. Setting value and dividing ratio
correspondence are shown in Table 5.10.3.1.
Table 5.10.3.1 Selection of prescaler dividing ratio
PSC31
PSC21
PSC11
PSC01
PSC30
PSC20
PSC10
PSC00
Prescaler dividing ratio
1
0
1
0
1
0
Source clock / 64
Source clock / 16
Source clock / 4
Source clock / 1
By writing "1" to the register PRUNx, the source
clock is input to the prescaler. Therefore, the
clock with selected dividing ratio is input to the
timer and the timer starts counting down.
When the 16-bit mode has been selected, the
dividing ratio for the source clock is selected by
register PSC0 (timer 0) or PSC2 (timer 2) and the
setting of the register PSC1 (timer 1) or PSC3
(timer 3) becomes invalid.
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