參數(shù)資料
型號： S1C88848D0A0100
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192
封裝： DIE-192
文件頁數(shù)： 6/174頁
文件大小： 1304K
代理商： S1C88848D0A0100
S1C88848 TECHNICAL MANUAL
EPSON
95
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Controller)
5.11.4 Display control
The display status of the built-in LCD driver and
the contrast adjustment can be controlled with the
built-in LCD controller. The LCD display status can
be selected by display control registers LCDC0 and
LCDC1. Setting the value and display status are
shown in Table 5.11.4.1.
Table 5.11.4.1 LCD display control
LCDC1
LCDC0
LCD display
1
0
1
0
1
0
All LCDs lit (Static)
All LCDs out (Dynamic)
Normal display
Drive OFF
All the dots in the LCD display can be turned on or
off directly by the drive waveform output from the
LCD driver, and data in the display memory is not
changed. Also, since the common terminal at this
time is set to static drive when all the dots are on
and is set to dynamic drive when they are off, this
function can be used as follows:
(1) Since all dots on is binary output (VC5 and VSS)
with static drive, the common/segment termi-
nal can be used as a monitor terminal for the
OSC1 oscillation frequency adjustment.
However, COM16 cannot be set in static drive
when 1/17 duty is selected.
(2) Since all dots off is dynamic drive, you can
brink the entire LCD display without changing
display memory data.
Selecting LCD drive OFF turns the LCD drive
power circuit OFF and all the VC1–VC5 terminals go
to VSS level. However, if external power supply has
been selected by the mask option, the VC1–VC5 shift
to floating status when drive is turned OFF.
Furthermore, when the SLP instruction is executed,
registers LCDC0 and LCDC1 are automatically
reset to "0" (set to drive off) by hardware.
The LCD contrast can be adjusted in 16 stages. This
adjustment is done by the contrast adjustment
register LC0–LC3, and the setting values corre-
spond to the contrast as shown in Table 5.11.4.2.
However, if external power supply has been
selected by the mask option, the contrast adjust-
ment register LC0–LC3 is ineffective and contrast
adjustment cannot be done. When LCx is set to a
value from A to F in TYPE B, the same contrast
results without changing the set value.
Table 5.11.4.2 LCD contrast adjustment
LC3
LC0
Contrast
1
:
0
1
0
1
:
0
1
0
Dark
Light
LC1
1
0
:
1
0
LC2
1
:
0
↑
↓
Note: Fixing the LCD contrast is not recommended.
A contrast adjustment function should be
included in the software.
5.11.5 Display memory
The S1C88848 has a built-in 402-byte display
memory. The display memory is allocated to
address F800H–FD42H (including unavailable
areas) and the correspondence between the
memory bits and common/segment terminal is
changed according to the selection status of the
following items.
(1) Drive duty (1/32, 1/17, 1/16 or 1/8 duty)
(2) Dot font (5
× 8 or 5 × 5 dots)
When 1/17, 1/16 or 1/8 duty is selected for drive
duty, two-screen memory can be secured, and the
two screens can be switched by the display memory
area selection register DSPAR. When "0" is written
to DSPAR, display area 0 is selected and when "1" is
written, display area 1 is selected.
Furthermore, memory allocation for 5
× 8 dots and
5
× 5 dots can be selected in order to easily display
5
× 5-dot font characters on the LCD panel.
This selection can be done by the dot font selection
register DTFNT: when "0" is written to DTFNT, 5
×
8 dots is selected and when "1" is written, 5
× 5 dots
is selected.
The correspondence between the display memory
bits set according to the drive duty and font size,
and the common/segment terminals are shown in
Figures 5.11.5.1–5.11.5.8.
When "1" is written to the display memory bit
corresponding to the dot on the LCD panel, the dot
goes ON and when "0" is written, it goes OFF. Since
display memory is designed to permit reading/
writing, it can be controlled in bit units by logical
operation instructions and other means (read,
modify and write instructions).
The display memory bits that have not been
assigned can be used as general purpose RAM with
read/write capabilities. Even when external
memory has expanded into the display memory
area, this area is not released to external memory.
Access to this area is always via display memory.
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