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7 DETAILS OF INSTRUCTIONS
S1C17 FAMILY S1C17 CORE MANUAL
EPSON
7-61
ld.a %rd, [%rb]
ld.a %rd, [%rb]+
ld.a %rd, [%rb]-
ld.a %rd, -[%rb]
Function
32-bit data transfer
ld.a %rd, [%rb]
Standard)
rd
(23:0)
← A[rb](23:0), ignored ← A[rb](31:24)
Extension 1) rd(23:0)
← A[rb + imm13](23:0), ignored ← A[rb + imm13](31:24)
Extension 2) rd(23:0)
← A[rb + imm24](23:0), ignored ← A[rb + imm24](31:24)
ld.a %rd, [%rb]+ (with post-increment option)
Standard)
rd
(23:0)
← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) + 4
Extension 1) rd(23:0)
← A[rb + imm13](23:0), ignored ← A[rb + imm13](31:24),
rb
(23:0)
← rb(23:0) + imm13
Extension 2) rd(23:0)
← A[rb + imm24](23:0), ignored ← A[rb + imm24](31:24),
rb
(23:0)
← rb(23:0) + imm24
ld.a %rd, [%rb]- (with post-decrement option)
Standard)
rd
(23:0)
← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) - 4
Extension 1) rd(23:0)
← A[rb + imm13](23:0), ignored ← A[rb + imm13](31:24),
rb
(23:0)
← rb(23:0) - imm13
Extension 2) rd(23:0)
← A[rb + imm24](23:0), ignored ← A[rb + imm24](31:24),
rb
(23:0)
← rb(23:0) - imm24
ld.a %rd, -[%rb] (with pre-decrement option)
Standard)
rb
(23:0)
← rb(23:0) - 4, rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24)
Extension 1) rb(23:0)
← rb(23:0) - imm13, rd(23:0) ← A[rb + imm13](23:0),
ignored
← A[rb + imm13](31:24)
Extension 2) rb(23:0)
← rb(23:0) - imm24, rd(23:0) ← A[rb + imm24](23:0),
ignored
← A[rb + imm24](31:24)
Code
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0 0 1 0 0 0
r d
0 0 1 1
r b
ld.a
%rd,[%rb]
|
0 0 1 0 0 0
r d
0 1 1 1
r b
ld.a
%rd,[%rb]+
|
0 0 1 0 0 0
r d
1 1 1 1
r b
ld.a
%rd,[%rb]-
|
0 0 1 0 0 0
r d
1 0 1 1
r b
ld.a
%rd,-[%rb]
|
Flag
IL IE
C
V
Z
N
– – – – – –
|
Mode
Src:Register indirect %rb = %r0 to %r7
Dst:Register direct %rd = %r0 to %r7
CLK
One cycle (two cycles when the ext instruction or an increment/decrement option is used)
Description (1) Standard
ld.a
%rd,[%rb]
; memory address = rb
The 32-bit data (the eight high-order bits are ignored) in the specified memory location is
transferred to the rd register. The rb register contains the memory address to be accessed.