7 DETAILS OF INSTRUCTIONS
S1C17 FAMILY S1C17 CORE MANUAL
EPSON
7-17
cmc
%rd, %rs
cmc/c %rd, %rs
cmc/nc %rd, %rs
Function
16-bit comparison with carry
Standard)
rd
(15:0) - rs(15:0) - C
Extension 1) rs(15:0) - imm13(zero extended) - C
Extension 2) rs(15:0) - imm16 - C
Code
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0 0 1 1 1 1
r d
1 0 0 1
r s
cmc
|
0 0 1 1 1 1
r d
0 0 0 1
r s
cmc/c
|
0 0 1 1 1 1
r d
0 1 0 1
r s
cmc/nc
|
Flag
IL IE
C
V
Z
N
– –
cmc
|
– – –
cmc/c, cmc/nc
|
Mode
Src:Register direct %rs = %r0 to %r7
Dst:Register direct %rd = %r0 to %r7
CLK
One cycle
Description (1) Standard
cmc
%rd,%rs
; rd - rs - C
Subtracts the contents of the rs register and C (carry) flag from the contents of the rd register,
and sets or resets the flags (C, V, Z and N) according to the results. The operation is performed
in 16-bit size. It does not change the contents of the rd register.
(2) Extension 1
ext
imm13
cmc
%rd,%rs
; rs - imm13 - C
Subtracts the contents of the 13-bit immediate imm13 and C (carry) flag from the contents of
the rs register, and sets or resets the flags (C, V, Z and N) according to the results. The imm13
is zero-extended into 16 bits prior to the operation. The operation is performed in 16-bit size. It
does not change the contents of the rd and rs registers.
(3) Extension 2
ext
imm13
; imm13(2:0) = imm16(15:13)
ext
imm13
; = imm16(12:0)
cmc
%rd,%rs
; rs - imm16 - C
Subtracts the contents of the 16-bit immediate imm16 and C (carry) flag from the contents of
the rs register, and sets or resets the flags (C, V, Z and N) according to the results. The operation
is performed in 16-bit size. It does not change the contents of the rd and rs registers.
(4) Conditional execution
The /c or /nc suffix on the opcode specifies conditional execution.
cmc/c
Executed as cmc when the C flag is 1 or executed as nop when the flag is 0
cmc/nc Executed as cmc when the C flag is 0 or executed as nop when the flag is 1
In this case, the ext instruction can be used to extend the operand.
(5) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the “d” bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example
(1) cmc
%r0,%r1 ; Changes the flags according to the results of
; r0 - r1 - C.
(2) ext
0x1fff
cmc
%r1,%r2 ; Changes the flags according to the results of
; r2 - 0x1fff - C.