7 DETAILS OF INSTRUCTIONS
S1C17 FAMILY S1C17 CORE MANUAL
EPSON
7-49
ld %rd, [%rb]
ld %rd, [%rb]+
ld %rd, [%rb]-
ld %rd, -[%rb]
Function
16-bit data transfer
ld %rd, [%rb]
Standard)
rd
(15:0)
← W[rb], rd(23:16) ← 0
Extension 1) rd(15:0)
← W[rb + imm13], rd(23:16) ← 0
Extension 2) rd(15:0)
← W[rb + imm24], rd(23:16) ← 0
ld %rd, [%rb]+ (with post-increment option)
Standard)
rd
(15:0)
← W[rb], rd(23:16) ← 0, rb(23:0) ← rb(23:0) + 2
Extension 1) rd(15:0)
← W[rb + imm13], rd(23:16) ← 0, rb(23:0) ← rb(23:0) + imm13
Extension 2) rd(15:0)
← W[rb + imm24], rd(23:16) ← 0, rb(23:0) ← rb(23:0) + imm24
ld %rd, [%rb]- (with post-decrement option)
Standard)
rd
(15:0)
← W[rb], rd(23:16) ← 0, rb(23:0) ← rb(23:0) - 2
Extension 1) rd(15:0)
← W[rb + imm13], rd(23:16) ← 0, rb(23:0) ← rb(23:0) - imm13
Extension 2) rd(15:0)
← W[rb + imm24], rd(23:16) ← 0, rb(23:0) ← rb(23:0) - imm24
ld %rd, -[%rb] (with pre-decrement option)
Standard)
rb
(23:0)
← rb(23:0) - 2, rd(15:0) ← W[rb], rd(23:16) ← 0
Extension 1) rb(23:0)
← rb(23:0) - imm13, rd(15:0) ← W[rb + imm13], rd(23:16) ← 0
Extension 2) rb(23:0)
← rb(23:0) - imm24, rd(15:0) ← W[rb + imm24], rd(23:16) ← 0
Code
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0 0 1 0 0 0
r d
0 0 1 0
r b
ld
%rd,[%rb]
|
0 0 1 0 0 0
r d
0 1 1 0
r b
ld
%rd,[%rb]+
|
0 0 1 0 0 0
r d
1 1 1 0
r b
ld
%rd,[%rb]-
|
0 0 1 0 0 0
r d
1 0 1 0
r b
ld
%rd,-[%rb]
|
Flag
IL IE
C
V
Z
N
– – – – – –
|
Mode
Src:Register indirect %rb = %r0 to %r7
Dst:Register direct %rd = %r0 to %r7
CLK
One cycle (two cycles when the ext instruction or an increment/decrement option is used)
Description (1) Standard
ld
%rd,[%rb]
; memory address = rb
The 16-bit data in the specified memory location is transferred to the rd register. The rb register
contains the memory address to be accessed. The eight high-order bits of the rd register are set
to 0.
(2) Extension 1
ext
imm13
ld
%rd,[%rb]
; memory address = rb + imm13
The ext instruction changes the addressing mode to register indirect addressing with
displacement. As a result, the content of the rb register with the 13-bit immediate imm13 added
comprises the memory address, the 16-bit data in which is transferred to the rd register. The
content of the rb register is not altered. The eight high-order bits of the rd register are set to 0.