參數(shù)資料
型號(hào)： PT7A6632J
廠商： Pericom Semiconductor Corp.
英文描述： PT7A6632 32-Channel HDLC Controller
中文描述： PT7A6632 32通道HDLC控制器
文件頁數(shù)： 9/61頁
文件大?。?/td> 379K
代理商： PT7A6632J
Data Sheet
PT7A6632 32-Channel HDLC Controller
PT019(05/02)
Ver:2
9
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Functional Description
General Description
The PT7A6632 HDLC Controller is applied between an exter-
nal memory and T1/E1 trunk interface to perform data trans-
mission and reception. See Figure 1. Its signal attributes are
shown in Figure 4.
PT7A6632 reads the data to be transmitted from the external
memory in 8-bit parallel way, formats them and adapts data
rate, then transmits the data to the T1/E1 trunk interface.
PT7A6632 receives serial data from the T1/E1 trunk interface,
Figure 4. PT7A6632 Interface Signals
A0-A15
D0-D7
READ
WRITE
AS
DMND
RSER
RSYNC
RRED
RCLK
TCLK
ATTN
ATACK
SYSACC
INTR
SYSCLK
CH0-CH4
Rx/Tx
RESET
HCS0-HCS1 T1/CEPT SIS
UAEN MDFS
TSEREN
TSER
TMAX
PT7A6632
External
Memory
CPU
T1/E1
Trunk
Interface
Channel
Status
Output
Device Mode
16
8
5
2
deformats them and adapts data rate, then stores the data into
the external memory.
The channel operation modes are set up in the external memory
by CPU. PT7A6632 reads the commands from the external
memory and process data channel by channel, totally 64 chan-
nels (32 for transmission and 32 for receive). Each channel
mode can be set up in external memory independently by CPU.
PT7A6632 consists of 4 functional blocks as shown in Figure
2. There are:
Transmit Bit-Level Processor,
Receive Bit-Level Processor,
Memory Manager, and
State/Control Machine.
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