參數(shù)資料
型號： PT7A6632J
廠商： Pericom Semiconductor Corp.
英文描述： PT7A6632 32-Channel HDLC Controller
中文描述： PT7A6632 32通道HDLC控制器
文件頁數(shù)： 20/61頁
文件大小： 379K
代理商： PT7A6632J
Data Sheet
PT7A6632 32-Channel HDLC Controller
PT019(05/02)
Ver:2
20
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External Memory Organization and
Definition
General Structure
The external memory is divided by the CPU into two func-
tional blocks for channel activation and data processing, re-
ferred as Activation Memory and Data Processing Memory.
The Activation Memory contains Channel Activation Byte
and Channel Buffer Pointers, providing PT7A6632 such in-
formation as channel activation/deactivation, channel direc-
tion (transmit or receive) and channel starting addresses. CPU
allocates the Channel Starting Pointer for each receive and
transmit channel.
The Data Processing Memory contains data/command buffers
storing descriptors, user’s data received or to be transmitted,
channel operation mode and status. CPU allocates a set of
linked data/command buffers for each receive and transmit
channel.
Details are shown in Figures 20-22.
(Address)
0
1
2
External Memory
(Contents)
Channel Activation Byte
128 Bytes of System Memory
for Channel Buffer Pointers
Data
Processing
Memory
j
j + 128
to
j + 255
p
p + 1
to
p + n 1
x
x + 1
to
x + n - 1
n-Byte Data Buffer
For Rx Channel #k
n-Byte Data Buffer
For Tx Channel #m
~
~
~
~
~
~
~
~
Activation
Memory
Figure 20. External Memory Map - Top Level
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參數(shù)描述
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