參數(shù)資料
型號(hào)： PT7A6632J
廠商： Pericom Semiconductor Corp.
英文描述： PT7A6632 32-Channel HDLC Controller
中文描述： PT7A6632 32通道HDLC控制器
文件頁(yè)數(shù)： 21/61頁(yè)
文件大小： 379K
代理商： PT7A6632J
Data Sheet
PT7A6632 32-Channel HDLC Controller
PT019(05/02)
Ver:2
21
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Activation Memory
The Activation Memory map is shown in the Figure 21.
Channel Activation Byte
The Channel Activation Byte are illustrated in the following
table 5. The PT7A6632 reads this byte so that gets the channel
number, the channel state (active or inactive) and the channel
direction (transmit or receive). The PT7A6632 asserts SYSACC
when it accesses the Activation Memory.
Channel Buffer Pointers
Channel Buffer Pointers provide PT7A6632 the channel start-
ing address (16-bit) for each channel, 64 channels totally, guid-
ing to a link of buffers containing data and command. The
relative location of the upper and lower bytes of the 16-bit
start address word is determined by the MDFS input (see Fig-
ure 17). The upper address lines (A8-A15) are placed in the
high-impedance state or LOW by the PT7A6632 during the
Activation Memory accesses.
Figure 21a. Activation Memory Map Locations (
MDFS = HIGH)
Channel Activation Byte
Channel Buffer Pointers
7 6 5 4 3 2 1 0
Active
x
Rx/Tx
XX00
XX01
Channel Number
XX7F
XX80
XX81
XX82
XX83
Byte Addresses xx01 Through
xx7F Are Not Used by PT7A6632
Transmit Channel 0 Start Address (High-Order Byte)
Transmit Channel 0 Start Address (Low-Order Byte)
Transmit Channel 1 Start Address (High-Order Byte)
Transmit Channel 1 Start Address (Low-Order Byte)
Transmit Channels 2 to 30 Start Addresses
XXBE
XXBF
XXC0
XXC1
Transmit Channel 31 Start Address (High-Order Byte)
Transmit Channel 31 Start Address (Low-Order Byte)
Receive Channel 0 Start Address (High-Order Byte)
Receive Channel 0 Start Address (Low-Order Byte)
Receive Channels 1 to 30 Start Address
XXFE
XXFF
Receive Channel 31 Start Address (High-Order Byte)
Receive Channel 31 Start Address (Low-Order Byte)
~
~
~
~
~
~
a. MDFS = HIGH (68000 Based)
(Address)
(HEX)
(Contents)
t
B 7
t
B 6
t
B 5
t
B 4
t
B 3
t
B 2
t
B 1
t
B 0
t
e
e
v
A
t
x
T
R
)
r
n
B
(
1
3
~
0
r
b
r
b
m
u
u
N
l
n
n
a
h
h
C
1
0
d
e
n
U
1
0
,
,
,
l
n
n
a
h
c
n
a
h
c
n
a
h
c
.
-
-
-
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
l
n
l
n
l
n
n
a
h
c
e
e
h
T
d
l
n
n
a
h
c
e
d
e
h
T
d
e
v
R
t
m
s
a
Table 5. Channel Activation Byte
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