參數(shù)資料
型號: PM8621
廠商: PMC-Sierra, Inc.
英文描述: NSE-8G⑩ Standard Product Data Sheet Preliminary
中文描述: 網(wǎng)絡(luò)搜索引擎,第八代⑩標準的產(chǎn)品數(shù)據(jù)的初步
文件頁數(shù): 138/184頁
文件大?。?/td> 1122K
代理商: PM8621
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NSE-8G Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
137
Figure 18 “C1” Synchronization Control
Ingress SBI
device
Ingress SBS
(1 frame delay)
Egress SBS
(1 frame delay)
500
μ
s Source
delay
t
1
t
0
,
t
1
t
2
t
3
t
4
delay
125
μ
s
t at 0
μ
s
Egress SBI
device
delay
t
2
delay
t
3
delay
t
4
t
0
NSE
delay
125
μ
s
(no delay t delay through
Ingress SBI device)
12.3
Synchronized Control Setting Changes
The NSE-8G and SBS support dual switch control settings. These dual settings permit one bank
of settings to be operational while the other bank is updated as a result of some new connection
requests. The CMP input selects the current operational switch control settings. CMP is sampled
by the NSE-8G on the RC1FP
.
The internal blocks sample the registered CMP value as they
receive the next C1 character after a delay of RC1DLY. The new CMP value is applied on the first
A1 character of the following STS-12 frame. This switchover is hitless; the control change does
not disrupt the user data flow in any way. This feature is required for the addition of arbitrary new
connections, as existing connections may need to be rerouted (see the discussion of the
connection routing algorithm in this document).
The DS0-granularity switch settings RAM in organized into two control settings banks, these are
switched by the above mechanisms on C1 boundaries. The NSE-8G also has to coordinate the
switching of the connected SBS devices (if using the In-Band link facility), so a broader
understanding of the issues is required.
The following sections provide examples.
12.3.1 SBS/NSE-8G Systems with DS0 and CAS Switching
When building a DS0 and Channel Associated Signaling switching system with the SBS, SBS-lite
and NSE-8G devices the overall timing is based on the CAS signaling multiframe on the SBI bus.
In this configuration the delay through the SBS devices is a single 125 μS SBI frame plus a few
77.76 MHz clocks and the delay through the NSE-8G is a few 77.76 MHz clocks. A single C1FP
frame synchronization signal is distributed around the system. Internal to the SBS and NSE-8G
devices are programmable offsets used to account for propagation delays through the system. The
key constraint is that all SBI frames are aligned going into the NSE-8G device.
Compatible devices are TEMUX-84, FREEDM-336, FREEDM-336-84 bond-out, S/UNI-IMA-
84, and other future SBI336 devices.
相關(guān)PDF資料
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PM8621-BIAP NSE-8G⑩ Standard Product Data Sheet Preliminary
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