![](http://datasheet.mmic.net.cn/330000/PM73488-PI_datasheet_16444396/PM73488-PI_113.png)
PMC-Sierra, Inc.
PM73488 QSE
L
PMC-980616
Issue 3
5 Gbit/s ATMSwitch Fabric Element
Released
Datasheet
115
10.3.3
SAMPLE
The sample instruction samples all the device inputs and outputs. For this instruction, the boundary scan
register is placed between TDI and TDO. Primary device inputs and outputs can be sampled by loading the
boundary scan register using the Capture-DR state. The sampled values can then be viewed by shifting the
boundary scan register using the Shift-DR state.
10.3.4
IDCODE
The identification instruction is used to connect the identification register between TDI and TDO. The
device’s identification code can then be shifted out using the Shift-DR state.
10.3.5
STCTEST
The single transport chain instruction is used to test out the TAP controller and the boundary scan register
during production test. When this instruction is the current instruction, the boundary scan register is con-
nected between TDI and TDO. During the Capture-DR state, the device identification code is loaded into
the boundary scan register. The code can then be shifted out on output TDO using the Shift-DR state.
Boundary Scan Pin Order
Table 32. Boundary Scan Pin order
10.4
Order #
Pin #
Pin name
Pin Type
0
HIZ
output enable
1
HIZ
output enable
2
HIZ
output enable
3
HIZ
output enable
4
HIZ
output enable
5
HIZ
output enable
6
HIZ
output enable
7
HIZ
output enable
8
HIZ
output enable
9
HIZ
output enable
10
G6
SCAN_ENN
clock
11
D3
OEN
clock
12
J6
CELL_START
clock
13
C2
CELL_24_START
clock
14
K6
STAT_OUT_NDI
output3
K6
STAT_OUT_NDI
input
16
E2
CTRL_IN_NDO
clock