- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378056 > PM73488 (PMC-SIERRA INC) 5 Gbit/s ATM Switch Fabric Element PDF資料下載
參數(shù)資料
| 型號： | PM73488 |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 5 Gbit/s ATM Switch Fabric Element |
| 中文描述： | ATM SWITCHING CIRCUIT, PBGA596 |
| 封裝： | EPBGA-596 |
| 文件頁數(shù)： | 112/135頁 |
| 文件大?。?/td> | 1735K |
| 代理商： | PM73488 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁當(dāng)前第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁
PMC-Sierra, Inc.
PM73488 QSE
L
PMC-980616
Issue 3
5 Gbit/s ATMSwitch Fabric Element
Released
Datasheet
114
instruction register is set to the IDCODE instruction.
10.2.2
Run-Test-Idle:
The run test/idle state is used to execute tests.
10.2.3
Capture-DR:
The capture data register state is used to load parallel data into the test data registers selected by the current
instruction. If the selected register does not allow parallel loads or no loading is required by the current
instruction, the test register maintains its value. Loading occurs on the rising edge of TCK.
10.2.4
Shift-DR:
The shift data register state is used to shift the selected test data registers by one stage. Shifting is from MSB
to LSB and occurs on the rising edge of TCK.
10.2.5
Update-DR:
The update data register state is used to load a test register’s parallel output latch. In general, the output
latches are used to control the device. For example, for the EXTEST instruction, the boundary scan test reg-
ister’s parallel output latches are used to control the device’s outputs. The parallel output latches are updated
on the falling edge of TCK.
10.2.6
Capture-IR:
The capture instruction register state is used to load the instruction register with a fixed instruction. The
load occurs on the rising edge of TCK.
10.2.7
Shift-IR:
The shift instruction register state is used to shift both the instruction register and the selected test data regis-
ters by one stage. Shifting is from MSB to LSB and occurs on the rising edge of TCK.
10.2.8
Update-IR:
The update instruction register state is used to load a new instruction into the instruction register. The new
instruction must be scanned in using the Shift-IR state. The load occurs on the falling edge of TCK.
The Pause-DR and Pause-IR states are provided to allow shifting through the test data and/or instruction reg-
isters to be momentarily paused.
The TDO output is enabled during states Shift-DR and Shift-IR. Otherwise, it is tri-stated.
Boundary Scan Instructions
The following is a description of the standard instructions. Each instruction selects an serial test data register path
between input, TDI, and output, TDO.
10.3
10.3.1
BYPASS
The bypass instruction shifts data from input TDI to output TDO with one TCK clock period delay. The
instruction is used to bypass the device.
10.3.2
EXTEST
The external test instruction allows testing of the interconnection to other devices. When the current instruc-
tion is the EXTEST instruction, the boundary scan register is place between input TDI and output TDO. Pri-
mary device inputs can be sampled by loading the boundary scan register using the Capture-DR state. The
sampled values can then be viewed by shifting the boundary scan register using the Shift-DR state. Primary
device outputs can be controlled by loading patterns shifted in through input TDI into the boundary scan reg-
ister using the Update-DR state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PM7349 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PM7350 | Dual Serial Link, PHY Multiplexer |
| PM7350-PI | DUAL SERIAL LINK PHY MULTIPLEXER |
| PM7351 | OCTAL SERIAL LINK MULTIPLEXER |
| PM7351-BI | OCTAL SERIAL LINK MULTIPLEXER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PM73488PI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| PM73488-PI | 制造商:Rochester Electronics LLC 功能描述: 制造商:PMC-Sierra 功能描述: |
| PM7349 | 制造商:PMC 制造商全稱:PMC 功能描述:Quad J2, E3 and DS-3 Framer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。