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PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7341 S/UNI-IMA-84
DATASHEET
PMC-2000223
ISSUE 4
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
116
10.4.2 Rx TC Layer (RTTC)
The Rx TC (RTTC) layer implements HCS cell delineation, payload
descrambling, idle cell filtering and header error detection to recover valid ATM
cells. These functions are performed in accordance with ITU-T Recommendation
I.432.1.
Cell delineation is the process of framing to ATM cell boundaries using the
header check sequence (HCS) field found in the ATM cell header. The HCS is a
CRC-8 (x
8
+ x
2
+ x + 1) calculation over the first 4 octets of the ATM cell header.
In accordance with ITU-T Recommendation I.432.1, the coset polynomial
x
6
+ x
4
+ x
2
+ 1 is added (modulo 2) to the received HCS octet before
comparison with the calculated result. When performing delineation, correct HCS
calculations are assumed to indicate cell boundaries. The cell delineation
circuitry performs a sequential bit-by-bit hunt for a correct HCS sequence. This
state is referred to as the HUNT state. When a correct HCS is found, a particular
cell boundary is assumed and the PRESYNC state is entered. This state verifies
that the previously detected HCS pattern was not a false indication. If the HCS
pattern was a false indication, then an incorrect HCS should be received within
the next DELTA cells and the delineation state machine falls back to the HUNT
state. If an incorrect HCS is not found in this PRESYNC period, then a transition
to the SYNC state is made, cell delineation is declared, and all non-idle cells with
a correct HCS are passed on. In the SYNC state, synchronization is not
relinquished until ALPHA consecutive incorrect HCS patterns are found. If this
happens, a transition is made back to the HUNT state. The state diagram of the
cell delineation process is shown in Figure 24.