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S/UNI-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
58
Pin Name
Type
Pin No
Function
OCIF_ENB_STPA
(A) RPU_RDENB
(A) Active-Low Read enable. When RPU_RDENB is asserted, a
read is executed from the S/UNI-ATLAS-3200 on the PHYID
which was present on RPU_ADDR during the cycle before
RPU_RDENB was asserted.
(B) not used
(C) RPP_ENB
(C) Active-Low Read enable. The RPP_ENB signal is used to
backpressure the flow of data from the receive FIFOs. During
data transfer, RPP_VAL must be monitored as it will indicate if
the RPP_DAT[31:0], RPP_MOD[1:0], RPP_SOP, RPP_EOP,
RPP_ERR and RPP_SX are valid. The system may deassert
RPP_ENB at anytime if it is unable to accept data from the
S/UNI-ATLAS-3200.
When RPP_ENB is sampled low, a read is performed from the
receive FIFO and the RPP_DAT[31:0], RPP_PAR,
RPP_MOD[1:0], RPP_SOP, RPP_EOP, RPP_ERR, RPP_SX
and RPP_VAL signals are updated on the following rising edge of
RPP_CLK.
When RPP_ENB is sampled low by the PHY device, a read is not
performed and the RPP_DAT[31:0], RPP_PAR, RPP_MOD[1:0],
RPP_SOP, RPP_EOP, RPP_ERR, RPP_SX and RPP_VAL
signals will not updated on the following rising edge of RPP_CLK.
(D) TLP_STPA
Input
(D) Selected PHY packet available.
TLP_STPA always provides status indication for the selected port
of PHY device in order to avoid FIFO overflows while polling is
performed. The use of TLP_STPA is optional. If USE_STPA is
logic 0 in the TxLink Configuration Register, then TLP_STPA is
ignored. If USE_STPA is logic 1, then the S/UNI-ATLAS-3200
will cease transmission immediately after sampling TLP_STPA
high, and may switch to another PHY at that point.
The port which TLP_STPA reports is updated on the following
rising edge of TLP_CLK after the PHY address on TLP_DAT is
sampled by the PHY device.
OCIF_SX
(A) not used
(B) not used
(C) RPP_SX
(C) Start of transfer. RPP_SX indicates when the in-band port
address is present on the RPP_DAT bus. When RPP_SX is high
and RPP_VAL is low, the value of RPP_DAT[7:0] is the address
of the receive FIFO to be selected by the PHY. Subsequent data
transfers on the RDAT bus will be from the FIFO specified by this
in-band address.
RPP_SX will not be asserted at the same time as RPP_VAL.
(D) TLP_SX
Output
(D) Start of transfer. TLP_SX indicates when the in-band port
address is present on the TLP_DAT bus. When TLP_SX is high
and TLP_ENB is high, the value of TLP_DAT[7:0] is the address
of the transmit FIFO to be selected. Subsequent data transfers
on the TLP_DAT bus will fill the FIFO specified by this in-band
address.
TLP_SX will not be asserted at the same time as TLP_ENB