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PRELIMINARY
PMC-Sierra, Inc.
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
53
E1, F1, D1-D3, H1-H3, B2, K1, K2, D4-D12, S1/Z1, Z2/M1/Z2 and E2). RTOHCLK is the
generated output clock used to provide timing for the RTOH output. RTOHCLK is a nominal
20.736 MHz clock generated by gapping a 25.92 MHz clock. Sampling RTOHFP high with the
rising edge of RTOHCLK identifies the MSB of the first A1 byte.
Figure 8: STS-48c (STM-16-16c) on RTOH
A1
B1
D1
H1
D4
D7
D10
S1
B2
A2
E1
A2
A2
D2
H2
K1
D5
D8
D11
Z2
Z2
Z2
J0
F1
D3
H3
H3
H2
H2
K2
D6
E2
D12
D9
Z0
H3
Z0
H3
Z0
H3
...
A2
M1
H2
A2
H2
Z2
ST
S-
1/
ST
M-
0
#1
2
ST
S-
1/
ST
M-
0
#4
ST
S-
1/
ST
M-
0
#3
ST
S-
1/
ST
M-
0
#2
ST
S-
1/
ST
M-
0
#1
ST
S-
1/
ST
M-
0
#1
2
ST
S-
1/
ST
M-
0
#4
ST
S-
1/
ST
M-
0
#3
ST
S-
1/
ST
M-
0
#2
ST
S-
1/
ST
M-
0
#1
Z1
Z1
Z1
H1
B2
H1
B2
H1
B2
A1
A1
A1
ST
S-
1/
ST
M-
0
#1
2
ST
S-
1/
ST
M-
0
#4
ST
S-
1/
ST
M-
0
#3
ST
S-
1/
ST
M-
0
#2
ST
S-
1/
ST
M-
0
#1
A1
B2
Z1
H1
First order of transmission
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
Z1
H1
B2
A1
ST
S-
1/
ST
M-
0
#5
A2
H2
Z2
ST
S-
1/
ST
M-
0
#5
H3
ST
S-
1/
ST
M-
0
#5
Unused bytes
National bytes
Z0
...
...
Z0
Z0 Z0 or National bytes
Se
co
nd
or
de
r
of
tra
ns
mi
ssi
on
A maskable interrupt is activated to indicate any change in the status of out of frame (OOF), loss
of frame (LOF), loss of signal (LOS), line remote defect indication (RDI-L), line alarm indication
signal (AIS-L), synchronization status message (COSSM), APS bytes (COAPS) and APS byte
failure (APSBF) or any errors in section BIP-8, line BIP-8 and line remote error indication (REI-L).
The RRMP block provides de-scrambled data and frame alignment indication signals for use by
the RHPP.
10.4 Receive Tail Trace Processor (RTTP)
The Receive Tail Trace Processor (RTTP) block monitors the tail trace messages of the receive
data stream for trace identifier unstable (TIU) defect and trace identifier mismatch (TIM) defect.
Three tail trace algorithms are defined.
The first algorithm is BELLCORE compliant. The algorithm detects trace identifier mismatch
(TIM) defect on a 16 or 64 byte tail trace message. A TIM defect is declared when none of the
last 20 messages matches the expected message. A TIM defect is removed when 16 of the last
20 messages match the expected message. The expected tail trace message is a static
message written in the expected page of the RTTP by an external microprocessor. Optionally,
the expected message is matched when the tail trace message is all zeros.