![](http://datasheet.mmic.net.cn/330000/PM5381_datasheet_16444347/PM5381_178.png)
PRELIMINARY
PMC-Sierra, Inc.
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
157
HMASKEN is set to logic 0, the H1/H2 bytes extracted from the TTOH port are inserted
instead of the path payload pointer bytes.
A1ERR:
The A1 error insertion (A1ERR) bit is used to introduce framing errors in the A1 bytes. When
A1ERR is set to logic 1, 76h instead of F6h is inserted in all of the A1 bytes of the STS-
12/STM-4 #1 according to the priority of Table 4. When A1ERR is set to logic 0, no framing
errors are introduced.
LRDIINS:
The line RDI insertion (LRDIINS) bit is used to force a line remote defect indication in the data
stream. When LRDIINS is set to logic 1, the 110 pattern is inserted in bits 6, 7 and 8 of the
K2 byte of STS-1/STM-0 #1 to force a line RDI condition. When LRDIINS is set to logic 0, the
line RDI condition is removed.
LAISINS:
The line AIS insertion (LAISINS) bit is used to force a line alarm indication signal in the data
stream. When LAISINS is set to logic 1, all ones are inserted in the line overhead and in the
payload (all the bytes of the frame except the section overhead bytes) to force a line AIS
condition. When LAISINS is set to logic 0, the line AIS condition is removed. Line AIS is
inserted/removed on frame boundary before scrambling.
Note, this bit must be set to the same value as the other LAISINS bits in the TRMP Aux2
Error Insertion, TRMP Aux3 Error Insertion and TRMP Aux4 Error Insertion registers.
LOSINS:
The LOS insertion (LOSINS) bit is used to force a loss of signal condition in the data stream.
When LOSINS is set to logic 1, the data steam is set to all zero (after scrambling) to force a
loss of signal condition. When LOSINS is set to logic 0, the loss of signal condition is
removed.
Note, this bit must be set to the same value as the other LOSINS bits in the TRMP Aux2 Error
Insertion, TRMP Aux3 Error Insertion and TRMP Aux4 Error Insertion registers.