![](http://datasheet.mmic.net.cn/330000/PM5381_datasheet_16444347/PM5381_229.png)
PRELIMINARY
PMC-Sierra, Inc.
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
208
PLOPI:
The path loss of pointer interrupt status (PLOPI) bit is an event indicator. PLOPI is set to
logic 1 to indicate any change in the status of PLOPV (entry to the LOP_state or exit from the
LOP_state). The interrupt status bit is independent of the interrupt enable bit. PLOPI is
cleared to logic 0 when this register is read.
This bit is only valid for RHPP STS-1/STM0 #1.
PAISI:
The path alarm indication signal interrupt status (PAISI) bit is an event indicator. PAISI is set
to logic 1 to indicate any change in the status of PAISV (entry to the AIS_state or exit from the
AIS_state). The interrupt status bit is independent of the interrupt enable bit. PAISI is
cleared to logic 0 when this register is read.
This bit is only valid for RHPP STS-1/STM0 #1.
PLOPCI:
The path loss of pointer concatenation interrupt status (PLOPCI) bit is an event indicator.
PLOPCI is set to logic 1 to indicate any change in the status of PLOPCV (entry to the
LOPC_state or exit from the LOPC_state). The interrupt status bit is independent of the
interrupt enable bit. PLOPCI is cleared to logic 0 when this register is read.
This bit is only valid for RHPP STS-1/STM0 #2-48.
PAISCI:
The path concatenation alarm indication signal interrupt status (PAISCI) bit is an event
indicator. PAISCI is set to logic 1 to indicate any change in the status of PAISCV (entry to the
AISC_state or exit from the AISC_state). The interrupt status bit is independent of the
interrupt enable bit. PAISCI is cleared to logic 0 when this register is read.
This bit is only valid for RHPP STS-1/STM0 #2-48.