參數(shù)資料
型號: PI7C21P100
廠商: Pericom Semiconductor Corp.
英文描述: 2-PORT PCI-X BRIDGE
中文描述: 2端口PCI - X橋接
文件頁數(shù): 7/77頁
文件大?。?/td> 603K
代理商: PI7C21P100
PI7C21P100
2-PORT PCI-X BRIDGE
ADVANCE INFORMATION
Page 7 of 77
June 10, 2005 Revision 1.06
8.1.36
8.1.37
8.1.38
8.1.39
8.1.40
8.1.41
8.1.42
8.1.43
8.1.44
8.1.45
8.1.46
8.1.47
8.1.48
8.1.49
8.1.50
8.1.51
8.1.52
8.1.53
8.1.54
8.1.55
8.1.56
8.1.57
8.1.58
8.1.59
8.1.60
8.1.61
8.1.62
8.1.63
8.1.64
IEEE 1149.1 COMPATIBLE JTAG CONTROLLER.................................................................. 65
9.1
INSTRUCTION
REGISTER..................................................................................................... 65
9.2
BYPASS
REGISTER................................................................................................................ 65
9.3
DEVICE
ID
REGISTER ........................................................................................................... 65
9.4
BOUNDARY
SCAN
REGISTER............................................................................................. 66
9.5
JTAG
BOUNDARY
REGISTER
ORDER................................................................................ 66
10
ELECTRICAL INFORMATION.................................................................................................... 74
10.1
MAXIMUM
RATINGS............................................................................................................ 74
10.2
DC
SPECIFICATIONS............................................................................................................. 74
10.3
AC
SPECIFICATIONS............................................................................................................. 74
10.4
POWER
CONSUMPTION ....................................................................................................... 75
11
MECHANICAL INFORMATION.................................................................................................. 76
12
ORDERING INFORMATION........................................................................................................ 76
MISCELLANEOUS CONTROL REGISTER – OFFSET 44h........................................... 52
EXTENDED CHIP CONTROL REGISTER 1 – OFFSET 48h......................................... 52
EXTENDED CHIP CONTROL REGISTER 2 – OFFSET 48h......................................... 53
ARBITER MODE REGISTER – OFFSET 50h................................................................. 53
ARBITER ENABLE REGISTER – OFFSET 54h.............................................................. 54
ARBITER PRIORITY REGISTER – OFFSET 58h........................................................... 54
SERR# DISABLE REGISTER – OFFSET 5Ch ................................................................ 55
PRIMARY RETRY COUNTER REGISTER – OFFSET 60h............................................. 56
SECONDARY RETRY COUNTER REGISTER – OFFSET 64h....................................... 56
DISCARD TIMER CONTROL REGISTER – OFFSET 68h............................................. 57
RETRY AND TIMER STATUS REGISTER – OFFSET 6Ch ............................................ 57
OPAQUE MEMORY ENABLE REGISTER – OFFSET 70h............................................ 57
OPAQUE MEMORY BASE REGISTER – OFFSET 74h................................................. 58
OPAQUE MEMORY LIMIT REGISTER – OFFSET 74h................................................ 58
OPAQUE MEMORY BASE UPPER 32-BIT REGISTER – OFFSET 78h ....................... 58
OPAQUE MEMORY LIMIT UPPER 32-BIT REGISTER – OFFSET 7Ch...................... 58
PCI-X CAPABILITY ID REGISTER – OFFSET 80h....................................................... 58
NEXT CAPABILITY POINTER REGISTER – OFFSET 80h ........................................... 59
PCI-X SECONDARY STATUS REGISTER – OFFSET 80h............................................. 59
PCI-X BRIDGE PRIMARY STATUS REGISTER – OFFSET 84h................................... 59
SECONDARY BUS UPSTREAM SPLIT TRANSACTION REGISTER – OFFSET 88h... 61
PRIMARY BUS DOWNSTREAM SPLIT TRANSACTION REGISTER – OFFSET 8Ch.. 61
POWER MANAGEMENT ID REGISTER – OFFSET 90h............................................... 61
NEXT CAPABILITIES POINTER REGISTER – OFFSET 90h........................................ 62
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET 90h.......................... 62
POWER MANAGEMENT CONTROL AND STATUS REGISTER – OFFSET 94h ......... 62
PCI-TO-PCI BRIDGE SUPPORT EXTENSION REGISTER – OFFSET 94h................. 63
SECONDARY BUS PRIVATE DEVICE MASK REGISTER – OFFSET B0h................... 63
MISCELLANEOUS CONTROL REGISTER 2 – OFFSET B8h ....................................... 64
9
相關(guān)PDF資料
PDF描述
PI7C21P100NH 2-PORT PCI-X BRIDGE
PI7C7100BNA PCI Bus Interface/Controller
PI7C7100 3-Port PCI Bridge
PI7C7100CNA 3-Port PCI Bridge
PI7C7300 3-PORT PCI-to-PCI BRIDGE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C21P100B 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-PORT PCI-X TO PCI-X BRIDGE
PI7C21P100BEVB 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C21P100BNH 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-PORT PCI-X TO PCI-X BRIDGE
PI7C21P100BNHE 功能描述:外圍驅(qū)動器與原件 - PCI PCI-X to PCI-XBridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C21P100EVB 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V