參數(shù)資料
型號(hào): PI7C21P100
廠(chǎng)商: Pericom Semiconductor Corp.
英文描述: 2-PORT PCI-X BRIDGE
中文描述: 2端口PCI - X橋接
文件頁(yè)數(shù): 22/77頁(yè)
文件大?。?/td> 603K
代理商: PI7C21P100
PI7C21P100
2-PORT PCI-X BRIDGE
ADVANCE INFORMATION
Page 22 of 77
June 10, 2005 Revision 1.06
4
PCI BUS OPERATION
This Chapter offers information about PCI transactions, transaction forwarding across
PI7C21P100, and transaction termination. The PI7C21P100 has two 2KB buffers for read
data buffering of upstream and downstream transactions. Also, PI7C21P100 has two 1KB
buffers for write data buffering of upstream and downstream transactions.
4.1
TYPES OF TRANSACTIONS
This section provides a summary of PCI and PCI-X transactions performed by PI7C21P100.
Table 4-1 lists the command code and name of each PCI and PCI-X transaction. The Master
and Target columns indicate support for each transaction when PI7C21P100 initiates
transactions as a master, on the primary and secondary buses, and when PI7C21P100
responds to transactions as a target, on the primary and secondary buses.
Table 4-1 PCI AND PCI-X TRANSACTIONS
Types of Transactions
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Initiates as Master
Primary
N
Y
Y
Y
N
N
Y
Y
N
N
N
Y (Type 1 only)
Y
Y
Y
Y
Responds as Target
Primary
N
N
Y
Y
N
N
Y
Y
N
N
Y
Y
Y
Y
Y
Y
Secondary
N
Y
Y
Y
N
N
Y
Y
N
N
Y
Y
Y
Y
Y
Y
Secondary
N
N
Y
Y
N
N
Y
Y
N
N
Y (Type 0 only)
Y
Y
Y
Y
Y
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
Memory Read Multiple
Dual Address Cycle
Memory Read Line
Memory Write and Invalidate
As indicated in Table 4-1, the following commands are not supported by PI7C21P100:
PI7C21P100 never initiates a transaction with a reserved command code and, as a target,
PI7C21P100 ignores reserved command codes.
PI7C21P100 does not generate interrupt acknowledge transactions. PI7C21P100 ignores
interrupt acknowledge transactions as a target.
PI7C21P100 does not respond to special cycle transactions. PI7C21P100 cannot
guarantee delivery of a special cycle transaction to downstream buses because of the
broadcast nature of the special cycle command and the inability to control the transaction as a
target. To generate special cycle transactions on other buses, either upstream or downstream,
Type 1 configuration write must be used.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C21P100B 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:2-PORT PCI-X TO PCI-X BRIDGE
PI7C21P100BEVB 功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V
PI7C21P100BNH 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:2-PORT PCI-X TO PCI-X BRIDGE
PI7C21P100BNHE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PCI-X to PCI-XBridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C21P100EVB 功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V