參數(shù)資料
型號(hào)： P62000NLG
廠(chǎng)商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 穩(wěn)壓器
英文描述： DUAL SWITCHING CONTROLLER, QCC64
封裝： ROHS COMPLIANT, QFN-64
文件頁(yè)數(shù)： 19/62頁(yè)
文件大?。?/td> 1221K
代理商： P62000NLG
IDTP62000
2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
IDT 2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
26
IDTP62000
REV E 050510
CONFIDENTIAL
Input Under Voltage and Enable/Disable
The IDTP62000 is enabled once the voltage on the VDD, UVLO_PVCC, and UVLO_VTT pins exceed their thresholds. The
VDD threshold is fixed but the UVLO_PVCC and UVLO_VTT thresholds can be programmed with a resistor divider. In most
applications UVLO_PVCC will monitor the 12V input while UVLO_VTT is used as the converter Enable input. Any sequence
of 5V and 12V input supplies is acceptable.
Deassertion of VDD, UVLO_PVCC, or UVLO_VTT pins will result in converter shutdown. If VDD is deasserted all digital
registers will revert to their default settings. Deassertion of either UVLO_PVCC or UVLO_VTT will reset the SMBus status
registers only. Figure 21 provides a block diagram of the Input under voltage and enable functions.
Figure 21: Input Under Voltage and Enable Block Diagram
Soft-Start and SMBus Address Programming
The soft-start function of the IDTP62000 enables a smooth charge of the output capacitors in order to limit the inrush input
current during startup. The soft-start function is enabled approximately 1 ms after Enable. The SS/SMBA0 pin also
determines the value of the SMBus address A0 bit. Connect a resistor from the SS/SMBA0 pin to either VDD or ground. If
the resistor is connected to VDD, the A0 bit is set to high. If the resistor is connected to ground, the A0 bit is set to low.
Intel Soft-Start
In Intel modes, the soft-start ramp is set by the RSS resistor. The IDTP62000 regulates the voltage across the resistor to
0.8V.Output voltage first ramps to Vboot and waits for a period of time, T3, (approximately 100 s). It then ramps to the value
determined by the active VID code. Equation 9 determines soft start rate frequency of each 6.25 mV step. The range of RSS
is 25 to 250 kohm.
FSS = 25x10
6 / R
SS kHz (equation 9)
The complete Intel mode soft start sequence is depicted in Figure 22. The POR signal occurs when all 3 enable inputs
become valid.
OSC
09
EN
Power on
Reset Logic
0.8V
UVLO_VTT
UVLO_PVCC
VDD (Pins
23 & 57)
12
11
nn
0.8V
Channel
Detection
3-4 Phase
Fault Detect
& Sync
Control
Ramp
Generation
Control &
Clocks
OV
OC
+
-
+
-
相關(guān)PDF資料
PDF描述
P95020NQG 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
P95020NQG8 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
P95020ZNQGI8 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
P95020ZLLG 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124
P95020ZLLGI 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P62000NLG8 制造商:Integrated Device Technology Inc 功能描述:PWM Controller 64-Pin QFN EP T/R 制造商:Integrated Device Technology Inc 功能描述:64 NLG (GREEN) - Tape and Reel
P6-20024 制造商:OTTO Engineering Inc 功能描述:S/A P6-20017 EX W/
P6-20029 制造商:OTTO Engineering Inc 功能描述:S/A P6-20021 EX 2PDT
P6-20030 制造商:OTTO Engineering Inc 功能描述:S/A P6-20029 EX SPDT
P6-20050 制造商:OTTO Engineering Inc 功能描述:S/A P6-20018 EX
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*