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參數(shù)資料
| 型號： | P62000NLG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, QCC64 |
| 封裝： | ROHS COMPLIANT, QFN-64 |
| 文件頁數(shù)： | 14/62頁 |
| 文件大?。?/td> | 1221K |
| 代理商： | P62000NLG |
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IDTP62000
2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
IDT 2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
21
IDTP62000
REV E 050510
CONFIDENTIAL
Dynamic Efficiency Control (DEC) Mode of Operation
For efficiency optimization, the IDTP62000 contains a unique and proprietary technique to monitor and adjust the number
of active phases based on the sensed load current. An internal determination is used to judge when phases should be turned
on and off. Traditional PWM regulators are typically programmed to satisfy the highest load demand. Lighter loads suffer the
most inefficiency due to the fixed nature of classic PWM architectures.
DEC is implemented to improve switching efficiency during light processor loads. In DEC mode, the controller continuously
monitors the current load and turns on/off one or more phases according to the load current requirements. The minimum
number of phases in DEC mode is configurable and the controller has 3 DEC threshold levels which can each be configured
independently.
All DEC levels are defined as a percentage of the scaled average phase current level that triggers an over current protection
condition.
The equation for each DEC trip point is given by:
(Eq. 2)
Figure 17: DEC Levels showing Hysteresis
DEC mode is not enabled by default. DEC mode is enabled when the DEC_EN field of the DEC_CTRL register is set to 1b
and the maximum number of available phases (based on the total number of configured phases) are turned on. Within a
programmable window delay, the controller compares the current load with the three programmed DEC thresholds (all DEC
H levels above the current level and all DEC L levels below the current level). No DEC L levels are checked when only 1
phase is enabled, and no DEC H levels are checked when all phases are enabled. If a DEC level transitions across a
threshold and remains there for more than 50% of the programmed window period then the number of active phases will be
adjusted accordingly.
32
)
1
]
0
:
4
[
(
+
× LEVEL
I
OCAVG
64
Total Internal Measured Current
0
100%
DEC_LEVEL3
DEC_LEVEL2
DEC_LEVEL1
All phases
active
3 phases
active
2 phases
active
1 phase
active
L H
80%
Over
Current
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