參數(shù)資料
型號： ORT82G5-2FN680I
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 90/119頁
文件大小： 0K
描述： IC TRANCEIVERS FPSC 680FPBGA
產品變化通告： Product Discontinuation 01/Aug/2011
標準包裝： 24
系列： *
Lattice Semiconductor
ORCA ORT42G5 and ORT82G5 Data Sheet
72
30805 - Ax
30905 - Bx
[0]xA
[1]xB
[2]xC
[3]xD
DEMUXWAS_xx
00
Status of Word Alignment. When DEMUX_WAS_xx=1, word alignment is
achieved for Channel xx. DEMUX_WAS_xx=0 on device reset.
[4]xA
[5]xB
[6]xC
[7]xD
CH248_SYNC_xx
Status of Channel Alignment. When CH248_SYNC_xx=1, multi-channel
alignment is achieved for Channel xx. CH248_SYNC_xx=0 on device
reset.
30814 - Ax
30914 - Bx
[0]
xA & AB
[1] xC & xD
SYNC2_[A:B][1:2]
OVFL
00
Multi-Channel Overow Status. When SYNC2_[A:B][1:2]OVFL=1, dual-
channel synchronization FIFO overow has occurred.
SYNC2_[A:B][1:2]OVFL=0 on device reset.
[2]
SYNC4_
[A:B]OVFL
Multi-Channel Overow Status. When SYNC4_[A:B]OVFL=1, quad-
channel synchronization FIFO overow has occurred.
SYNC4_[A:B]OVFL=0 on device reset.
[3]
xA & AB
[4] xC & xD
SYNC2_[A:B][1:2]
OOS
Multi-Channel Out-Of-Sync Status. When SYNC2_[A:B][1:2] OOS=1,
dual-channel synchronization has failed.
SYNC2_[A:B][1:2] OOS=0 on device reset.
[5]
SYNC4_[A:B]_OO
S
Multi-Channel Out-Of-Sync Status. When SYNC4_[A:B]_OOS=1, quad-
channel synchronization has failed.
SYNC4_[A:B]_OOS=0 on device reset.
[6:7]
Reserved for future use.
Common Control Registers (Read/Write)
30A00
[0:1]
TCKSELA
00
Transmit Clock Select. Controls source of 78 MHz TCK78 for SERDES
quad A
00 = Channel AA
10 = Channel AB
01 = Channel AC
11 = Channel AD
[2:3
RCKSELA
Receive Clock Select. Controls source of 78 MHz RCK78 for SEDRES
quad A
00 = Channel AA
10 = Channel AB
01 = Channel AC
11 = Channel AD
[4:5]
TCKSELB
Transmit Clock Select. Controls source of 78 MHz TCK78 for SERDES
quad B
00 = Channel BA
10 = Channel BB
01 = Channel BC
11 = Channel BD
[6:7]
RCKSELB
Receive Clock Select. Controls source of 78 MHz RCK78 for SERDES
quad B
00 = Channel BA
10 = Channel BB
01 = Channel BC
11 = Channel BD
30A01
[0:4]
—
00
Reserved for future use
[5:7]
RX_FIFO_MIN
LSb’s for the threshold for low address in RX_FIFOs. RX_FIFO_MIN, Bit
5 is LSb. Useful values for RX_FIFO_MIN [0:4] are 0 to 17(decimal).
Table 30. ORT82G5 Memory Map (Continued)
(0x)
Absolute
Address
Bit
Name
Reset
Value
(0x)
Description
相關PDF資料
PDF描述
VI-J4H-IW-F4 CONVERTER MOD DC/DC 52V 100W
VI-J4H-IW-F3 CONVERTER MOD DC/DC 52V 100W
ORT82G5-1FN680C IC TRANCEIVERS FPSC 680FPBGA
ORT82G5-2FN680C IC TRANCEIVERS FPSC 680FPBGA
MSP430F4793IPZ IC MCU 16BIT 60KB FLASH 100LQFP
相關代理商/技術參數(shù)
參數(shù)描述
ORT82G5-2FN680I1 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-3BM680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-3BM680C2 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:0.6 to 3.7 Gbps XAUI and FC FPSCs
ORT82G5-3F680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-3FN680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 1.5V 3.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*