參數(shù)資料
型號： ORT82G5-2FN680I
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 28/119頁
文件大小： 0K
描述： IC TRANCEIVERS FPSC 680FPBGA
產(chǎn)品變化通告： Product Discontinuation 01/Aug/2011
標(biāo)準(zhǔn)包裝： 24
系列： *
Lattice Semiconductor
ORCA ORT42G5 and ORT82G5 Data Sheet
16
Transmit Path (FPGA to Backplane) Logic
The transmitter section accepts four groups of either 8-bit unencoded data or 10-bit encoded data at the parallel
interface to the FPGA logic. It also uses the reference clock, REFCLK[P:N]_[A:B] to synthesize an internal high-
speed serial bit clock. The serialized transmitted data are available at the differential CML output pins to drive either
an optical transmitters, coaxial media or a circuit board backplane.
As shown in Figure 3, the basic blocks in the transmit path include:
Embedded Core/FPGA interface and 4:1 multiplexer
Low speed parallel core/FPGA interface
4:1 multiplexer
Transmit SERDES
8b/10b Encoder
10:1 Multiplexer
CML Output Buffer
Detailed descriptions of the logic blocks are given in following sections. Detailed descriptions of transmit clock dis-
tribution, including the transmit PLL are given in later sections of this data sheet.
Figure 3. Basic Logic Blocks, Transmit Path, Single Channel (Typical Reference Clock Frequency)
÷ 4
FIFO
4:1 MUX
(x9)
PLL
CML
Buffer
with Pre-
emphasis
10:1
MUX
8B/10B
Encoder
(with
bypass)
Interface and MUX Block
TX SERDES Block
STBD_xx[7:0]
STBD_xx[8]
STBD_xx[9]
STBC311_xx
8
8-bit data
K-control
Force-ve disparity
312.5 MHz
HDOUTP_xx
HDOUTN_xx
REFCLKP_[A:B]
REFCLKN_[A:B]
CML
Buffer
Backplane
Serial
Link
FPGA
Logic
TWDxx[31:0]
32
TCOMMAxx[3:0]
4
TBIT9xx[3:0]
4
TSYS_CLK_xx
MUX
TCK78[A:B]
78.125 MHz
TCKSEL[0:1][A:B]
Logic Common to Block
From other channel
or channels
To other
channel or
channels
From Control
Register
{
For ORT42G5: xx = [AC, AD, BC or BD]
For ORT82G5: xx = [AA, AB, ... BD]
156.25 MHz
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ORT82G5-2FN680I1 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-3BM680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-3BM680C2 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:0.6 to 3.7 Gbps XAUI and FC FPSCs
ORT82G5-3F680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-3FN680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 1.5V 3.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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