參數資料
型號： OMAP5910(DSP)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數： 81/160頁
文件大?。?/td> 1997K
代理商： OMAP5910(DSP)
Functional Overview
69
August 2002 Revised August 2003
SPRS197B
Table 327. USB Function Registers
BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS
WIDTH
ACCESS
TYPE
RESET
VALUE
FFFB:4000
REV
Revision Register
16
R
FFFB:4004
EP_NUM
Endpoint Selection Register
16
RW
0000h
FFFB:4008
DATA
Data Register
16
RW
undef
FFFB:400C
CTRL
Control Register
16
RW
0000h
FFFB:4010
STAT_FLG
Status Flag Register
16
R
0202h
FFFB:4014
RXFSTAT
Receive FIFO Status Register
16
R
0000h
FFFB:4018
SYSCON1
System Configuration 1 Register
16
RW
0000h
FFFB:401C
SYSCON2
System Configuration 2 Register
16
RW
0000h
FFFB:4020
DEVSTAT
Device Status Register
16
R
undef
FFFB:4024
SOF
Start of Frame Register
16
R
0000h
FFFB:4028
IRQ_EN
Interrupt Enable Register
16
RW
undef
FFFB:402C
DMA_IRQ_EN
DMA Interrupt Enable Register
16
RW
undef
FFFB:4030
IRQ_SRC
Interrupt Source Register
16
RW
0000h
FFFB:4034
EPN_STAT
Endpoint Interrupt Status Register
16
R
0000h
FFFB:4038
DMAN_STAT
DMA Endpoint Interrupt Status Register
16
R
0000h
FFFB:403C
Reserved
FFFB:4040
RXDMA_CFG
Receive Channels DMA Configuration Register
16
RW
0000h
FFFB:4044
TXDMA_CFG
Transmit Channels DMA Configuration Register
16
RW
0000h
FFFB:4048
DATA_DMA
DMA FIFO Data Register
16
RW
undef
FFFB:404C
Reserved
FFFB:4050
TXDMA0
Transmit DMA Control 0 Register
16
RW
0000h
FFFB:4054
TXDMA1
Transmit DMA Control 1 Register
16
RW
0000h
FFFB:4058
TXDMA2
Transmit DMA Control 2 Register
16
RW
0000h
FFFB:405C
Reserved
FFFB:4060
RXDMA0
Receive DMA Control 0 Register
16
RW
0000h
FFFB:4064
RXDMA1
Receive DMA Control 1 Register
16
RW
0000h
FFFB:4068
RXDMA2
Receive DMA Control 2 Register
16
RW
0000h
FFFB:406C
FFFB:407C
Reserved
FFFB:4080
EP0
Endpoint Configuration 0 Register
16
RW
0000h
FFFB:4084
EP1_RX
Receive Endpoint Configuration 1 Register
16
RW
undef
FFFB:4088
EP2_RX
Receive Endpoint Configuration 2 Register
16
RW
undef
FFFB:408C
EP3_RX
Receive Endpoint Configuration 3 Register
16
RW
undef
FFFB:4090
EP4_RX
Receive Endpoint Configuration 4 Register
16
RW
undef
FFFB:4094
EP5_RX
Receive Endpoint Configuration 5 Register
16
RW
undef
FFFB:4098
EP6_RX
Receive Endpoint Configuration 6 Register
16
RW
undef
FFFB:409C
EP7_RX
Receive Endpoint Configuration 7 Register
16
RW
undef
FFFB:40A0
EP8_RX
Receive Endpoint Configuration 8 Register
16
RW
undef
FFFB:40A4
EP9_RX
Receive Endpoint Configuration 9 Register
16
RW
undef
FFFB:40A8
EP10_RX
Receive Endpoint Configuration 10 Register
16
RW
undef
FFFB:40AC
EP11_RX
Receive Endpoint Configuration 11 Register
16
RW
undef
FFFB:40B0
EP12_RX
Receive Endpoint Configuration 12 Register
16
RW
undef
FFFB:40B4
EP13_RX
Receive Endpoint Configuration 13 Register
16
RW
undef
FFFB:40B8
EP14_RX
Receive Endpoint Configuration 14 Register
16
RW
undef
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相關代理商/技術參數
參數描述
OMAP5910GGZG1 制造商:Rochester Electronics LLC 功能描述:- Bulk
OMAP5910GGZG2 制造商:Rochester Electronics LLC 功能描述:- Bulk
OMAP5910JGDY1R 功能描述:IC OMAP DUAL-CORE PROC 289-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:OMAP-59xx 標準包裝:60 系列:SCC 處理器類型:Z380 特點:全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應商設備封裝:144-LQFP 包裝:托盤
OMAP5910JGDY2 功能描述:數字信號處理器和控制器 - DSP, DSC Applications Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
OMAP5910JGZG1 制造商:Texas Instruments 功能描述:
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