參數(shù)資料
型號(hào): OMAP5910(DSP)
英文描述: Dual-Core Processor
中文描述: 雙核處理器
文件頁數(shù): 122/160頁
文件大?。?/td> 1997K
代理商: OMAP5910(DSP)
Electrical Specifications
110
August 2002 Revised August 2003
SPRS197B
If USB host function is used, it is recommended that a very low PPM crystal (
50 ppm) be used for the
12- or 13-MHz oscillator circuit. If the USB host function is not used, then a crystal of
180 ppm is
recommended. When selecting a crystal, the system design must take into account the temperature and aging
characteristics of a crystal versus the user environment and expected lifetime of the system.
Table 54 shows the switching characteristics of the base oscillator.
Table 54. Base Oscillator Switching Characteristics
PARAMETER
MIN
TYP
MAX
UNIT
Start-up time (from power up until oscillating at stable frequency of 12 or 13 MHz)
1
4
ms
μ
A
MHz
IDDA, active current consumption
Oscillation frequency
350
12 or 13
5.6.3 Internal Clock Speed Limitations
Table 55 provides a summary of the maximum frequencies that each clock domain may be configured to run
on the OMAP5910 device
Table 55. Internal Clock Speed Limitations
CLOCK
MAX OPERATING FREQUENCY
UNIT
MPU (CLKM1)
150
MHz
DSP (CLKM2)
150
MHz
TC (CLKM3)
75
MHz
DPLL1
150
MHz
All clock domains must be derived from the same DPLL1 frequency setting; therefore, the following conditions
must be satisfied where ‘m’, ‘n’, and ‘o’ are each equal to either 1, 2, 4, or 8:
MPU frequency = (DPLL1 clock frequency) / m
DSP frequency = (DPLL1 clock frequency) / n
TC frequency = (DPLL1 clock frequency) / o
For example, the following configuration is valid:
MPU/DSP/TC = 150 MHz/150 MHz/75 MHz, where m = n = 1 and o = 2
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