參數(shù)資料
型號: MX98905B
廠商: Macronix International Co., Ltd.
英文描述: IEEE 802.3, 10BASE5, 10BASE2 Controller and Integrated Bus Interface(IEEE 802.3, 10BASE5, 10BASE2控制器和集成總線接口)
中文描述: IEEE 802.3標準,10BASE5,10Base2的控制器和集成總線接口(IEEE 802.3標準,10BASE5,10Base2的控制器和集成總線接口)
文件頁數(shù): 44/86頁
文件大小: 352K
代理商: MX98905B
44
P/N: PM0365
REV. 1.3, NOV 20 ,1995
MX98905B
BPS0
BPS1
BPS2
BPS3
COMP
INTMOD
CLKSEL
SOFEN
0
1
2
3
4
5
6
7
Bits
SYMBOL
BIT
DESCRIPTION
BPS0-3
D0-D3
BOOT PROM SELECT. Selects address and the size with which boot PROM
begins. When the system reads within the selected memory area, the MX98905
reads the data in through MEMD0-7 and drives it onto the system data bus. The
following are valid addresses and size provided by the MX98905:
BPS3
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
BPS2
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
BPS1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
BPS0
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ADDRESS
X
0C000H
0C400H
0C800H
0CC00H
0D000H
0D400H
0D800H
0DC00H
0C000H
0C800H
0D000H
0D800H
0C000H
0D000H
SIZE (I/O SHARED MEMORY)
No boot prom
8K/16K
8K/16K
8K/16K
8K/16K
8K/16K
8K/16K
8K/16K
8K/16K
32K/32K
32K/32K
32K/32K
32K/32K
64K/64K
64K/64K
3.3 HARDWARE CONFIGURATION REGISTER C (CC)
Access to Configuration Register C is allowed only in the MX98905 enhanced mode. This feature is not supported
when the MX98905 is not programmed to new page 1.
Read/write port : Base + 0CH/Base + 1CH (I/O/MEM)
Read/write condition:
NPGEN = 1
PGSEL = 1
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