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| 型號： | MX98905B |
| 廠商： | Macronix International Co., Ltd. |
| 英文描述： | IEEE 802.3, 10BASE5, 10BASE2 Controller and Integrated Bus Interface(IEEE 802.3, 10BASE5, 10BASE2控制器和集成總線接口) |
| 中文描述： | IEEE 802.3標(biāo)準(zhǔn)，10BASE5，10Base2的控制器和集成總線接口（IEEE 802.3標(biāo)準(zhǔn)，10BASE5，10Base2的控制器和集成總線接口） |
| 文件頁數(shù)： | 20/86頁 |
| 文件大?。?/td> | 352K |
| 代理商： | MX98905B |
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20
P/N: PM0365
REV. 1.3, NOV 20 ,1995
MX98905B
After EEPROM_STORE is executed, the current con-
figuration will NOT be changed. If user wants to use
the new configuration, he should turn the power off and
then turn it on to load new configuration into the
MX98905 through valid power-on reset.
For user's convenience, the MX98905 provides the
feature for software programmer to update the current
configuration after EEPROM_STORE is executed,
i.e., you don't have to switch the power to update the
configuration. See Enhanced Description for details.
9. ENHANCED FEATURE FUNCTIONAL DESCRIP-
TION
There are two registers, HCMR and HCFR which
control the main fuctions of MX98905's enhaned
mode. HCMR is the abbreviation of Hidden Command
Register and HCFR for Hidden Configuration Register.
Bit assignment and function of each bit of HCMR and
HCFR will be fully descibed in REGISTER DESCRIP-
TIONS. For your quick reference, bit assignments of
HCMR and HCFR are shown below before we present
the enhanced features of MX98905. The following
shows the bit assignment for HCMR:
Following shows the bit assignment for HCFR
9.1 Load HCFR From EEPROM
The high-byte value of address 0FH of EEPROM will
be loaded into Hidden ConFiguration Register (HCFR)
if a valid power-on reset is detected by the MX98905.
HCFR is only active when HCFRE bit of HCMR
(Hidden CoMmand Register, supported by the
MX98905) is set high. If software doesn't alter the
value of HCFRE, the value in HCFR has no effect. In
the same way, when EEPROM_STORE algorithm is
executed, contents of HCFR will be stored back to
EEPROM at the location from where they come.
NPGEN
MULTI ALLWR
RESVD
IDECMD
PGSEL HCFRE
AUTO
RESVD
IOBEN
PAGE
NEWCF
LOCKE
RESVD
RESVD
RESVD
9.2 16 Bytes IDPROM write back function
To write configuration into the EEPROM in either
MX98905 or MX98905A, user must follow the
procedure described in section 8.
In MX98905, a "1" value in ALLWR bit will cause the
controller to write CA, CB, CC and ID to EEPROM.
While in MX98905A, a "1" value in ALLWR bit will write
CA, CB, CC, ID, and the rest of 8 bytes from IDPROM
registers. i.e. the entire 16 bytes of IDPROM registers
can be written back to EEPROM. The other EEPROM
write back command is IDWCMD command whose
function remains the same as old version.
When loading data from EEPROM during power-on
reset, values in IDPROM register byte 15th and 16th
are never written back to EEPROM but initialized to
correct value according to slot's data width during
power-on reset. these two bytes can be modified
through software programming.
9.3 Update Current Configuration After
EEPROM_STORE is Finished
When NEWCF bit of HCFR is set, the contents of CA,
CB and CC will be updated to the value in
EEPROM_STORE algorithm after EEPROM_STORE
algorithm is finished. USER DOESN'T HAVE TO
SWITCH THE POWER TO USE THE NEW CONFIGU-
RATION.
9.4 Access ID PROM Through I/O Port IN NE2000
Compatible
When NPGEN is high and PGSEL is low (both in
HCMR), the MX98905 is programmed to New Page 0.
Contents of ID PROM can be directly accessed
through I/O port. Table 4 and Table 5 show the
address mapping.
9.5 Auto Configuration
The MX98905 provides a powerful feature for pro-
grammer to program the LAN card in order to avoid the
"IO base is conflict with other add_ on cards" program.
When bit 3 (AUTO) of HCMR is set to 1, the MX98905
will change the internal IO base automatically. When
software writes to AUTO the first time, the IO base will
change to 300H no matter the current IO base is.
Susbsequent writing to AUTO bit will make the
MX98905 jump to the "next" IO base as described in
next paragraph. After AUTO is issued, user can use
the information provided below to read the AutoStatus
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