參數(shù)資料
型號(hào)： MX98742
英文描述： FEBC 100 Base Fast Ethernet Bridge Controller
中文描述： FEBC 100基地快速以太網(wǎng)橋控制器
文件頁(yè)數(shù)： 8/36頁(yè)
文件大?。?/td> 166K
代理商： MX98742
8
MX98745
P/N:PM0427
REV. 1.4, JUL. 8, 1998
F. LED Display/EEPROM Interface, 14 pins
PAD #
74
Name
LEDEN
I/O
O,
Description
Led Output Enable. When LEDEN is asserted high, it means that varuous
internal CMOS status is shown on LED[7:0] according to the value on
LDS[2:0]
LED Output Select. LDS0 is internally pulldown and value on LDS0 will be
latched internally by MX98745 at the rising edge of RESETL as the value
of EECONF. Value on LDS1 will act as EEPROM Data Input signal during
EEPROM loading operation (after power on reset and EECONF is set to 1)
and LDS2 will be data output from EEPROM.
When EECONF is low, EEPROM operation will be disabled.
After power on reset, LDS[2:0] work as the select pins of LED[7:0] output.
The following are corresponding definition
LDS2 LDS1 LDS0
0 0 1 Link/Receive
0 1 0 Isolation
0 1 1 Partition
1 0 0 Utilization
1 0 1 Collision Rate
LED 0/EEPROM Clock/Partition Select. Value on this pin will be latched by
MX98745 at the rising edge of RESETL as the value of Partition Select
(PARSEL).
When EECONF is set to 1, this pin will work as EEPROM clock pin and
output by MX98745 after power on reset. When EEPROM operation is
enabled, internal repeater function will be disabled until contents in EEPROM
is loaded into MX98745.
After EEPROM operation is completed, this pin will display port 0's
Receivee/Link, Partition, Isolation status and indicates 10% Network
utilization and 3% collision rate according to the value of LDS[2:0].
LED 1/PCS & MAC type MII Select. When Power on reset, value on this
pin will be latched at the rising edge of RESETL and be the value of PMSEL
which can program the universal port (port 0) to PCS or MAC type MII
interface. In normal operation (after power on reset), this pin will display
port 1's Receivee/Link, Partition, Isolation status and indicates 20%
Network utilization and 6% collision rate according to the value on LDS[2:0]
78,
76,
75
LDS2/EDO,
LDS1/EDI,
LDS0/EECONF
I/O,
TTL
79
LEDO/,
EECK/,
PARSEL
I/O
TTL
82
LED1/PMSEL
I/O,
TTL
Table 5-1 Pin Description for XRC II (Continued)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MX98743 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller
MX98745 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100 BASE-TX/FX REPEATER CONTROLLER
MX98746 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100 Base-TX/FX 5-Port Class II Repeater Controller
MX98747 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10/100M 8PORT DUAL SPEED HUB CONTROLLER
MX98748 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Highly Intergated 10/100M Dual Speed Hub With Extra 4 Port Switch Built-In
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