參數(shù)資料
型號: MX98742
英文描述: FEBC 100 Base Fast Ethernet Bridge Controller
中文描述: FEBC 100基地快速以太網(wǎng)橋控制器
文件頁數(shù): 19/36頁
文件大?。?/td> 166K
代理商: MX98742
19
MX98745
P/N:PM0427
REV. 1.4, JUL. 8, 1998
H. Link Status Register (register #25) (R)
Bit(s)
25.15:8
25.7
Name
Reserved
LinkP7
Description
Always 0.
1 : Link Status is OK at port 7
0 : Link Status is Fail at Port 7
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 6
0 : Link Status is Fail at Port 6
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 5
0 : Link Status is Fail at Port 5
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 4
0 : Link Status is Fail at Port 4
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 3
0 : Link Status is Fail at Port 3
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 2
0 : Link Status is Fail at Port 2
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 1
0 : Link Status is Fail at Port 1
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 0
0 : Link Status is Fail at Port 0
Status is updated at every LSCLK clock.
R/W
R
R
25.6
LinkP6
R
25.5
LinkP5
R
25.4
LinkP4
R
25.3
LinkP3
R
25.2
LinkP2
R
25.1
LinkP1
R
25.0
LinkP0
R
Table 6-8 Link Status Register Bit Definition
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