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參數(shù)資料
| 型號(hào)： | MX98742 |
| 英文描述： | FEBC 100 Base Fast Ethernet Bridge Controller |
| 中文描述： | FEBC 100基地快速以太網(wǎng)橋控制器 |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MX98742 |
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13
MX98745
P/N:PM0427
REV. 1.4, JUL. 8, 1998
Bit(s)
0.9
Name
Restart
Auto-Negotiation
Description
Forced to 0 and indicate that Auto-Negotiation process is
disable.
Write 1 to this bit has no effect.
Forced to 0 and indicate that only Half
Duplex is available.
Write 1 to this bit has no effect.
1 : enable COL signal test. The PHY will assert the COL
signal within 5120 ns in response to the assertion of TXEN.
While this bit is set to one, the PHY will deassert the COL
signal within 40 ns in respons to the deassertion of TXEN.
0 : normal operation.
Set to 0 after power on reset.
Value 0 will be read when one tries to read these bits.
R/W
R
0.8
Duplex Mode
R
0.7
Collision Test
R/W
0.6:0
Reserved
R
Table 6-1 Control Register Bit Definition
B. Status Register (register #1) (R)
Bit(s)
1.15
Name
100BASE-T4
Description
Forced to 0 and indicates that XRC is not able to perform
100BASE-T4.
Forced to 0 and indicates that XRC is not able to perform
100BASE-X Fill Duplex.
Forced to 1 and indicates that XRC is able to perform
100BASE-X Half Duplex.
Forced to 0 and indicates that XRC is not able to perform
10 Mb/s Full Duplex.
Forced to 0 and indicates that XRC is not able to perform
10 Mb/s Half Duplex.
Value 0 will be released by XRC when read.
Forced to 0.
Complete
Forced to 0.
Forced to 0.
R/W
R
1.14
100BASE-X
Full Duplex
100BASE-X
Half Duplex
10 Mb/s Full Duplex
R
1.13
R
1.12
R
1.11
10 Mb/s Half Duplex
R
1.10:6
1.5
Reserved
Auto-Negotiation
R
R
1.4
1.3
Remote Fault
Auto-Negotiation
Ability
Link Status
R
R
1.2
1 : All ports are link up.
0 : Any port is link fail. Will be set to 1 after this port is read.
1 : Jabber condition in any port is detected.
0 : No Jabber condition detected for all ports
Forced to 1.
R
1.1
Jabber Detect
R
1.0
Extended Capability
R
Table 6-2 Status Register Bit Definition
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