參數(shù)資料
型號: MT9074
廠商: Mitel Networks Corporation
英文描述: T1/E1/J1 Single Chip Transceiver(T1/E1/J1單片收發(fā)器)
中文描述: T1/E1/J1收發(fā)單芯片收發(fā)器(T1/E1/J1收發(fā)單片收發(fā)器)
文件頁數(shù): 66/120頁
文件大?。?/td> 362K
代理商: MT9074
MT9074
Advance Information
66
Per Time Slot Control Words)(Pages 7 and 8) (T1)
The control functions described by Table 75 are repeated for each DS1 time slot. Page 7 addresses 10000 to
11111 correspond to DS1 time slot 1 to 16, while page 8 addresses 10000 to 10111 correspond to time slots
17 to 24. Table 74 illustrates the mapping between the addresses of these pages and the DS1 channel
numbers.
Bit
Name
Functional Description
7 - 4
A(n),
B(n)
C(n),
D(n)
Transmit Signalling Bits for Channel n
. When control bit MSN = 1 and RPSIG =
1 this nibble is used. For ESF links these 4 bits are transmitted on the associated
DS1 channel (see table 8) in frames 6, 12, 18 and 24. For D4 links bits A are
transmit on the associated DS1 channel of frame 6 and bits B are transmit on the
associated DS1 channel of frame 12. For D4 links bits C and D are unused.
3 - 0
A(n),
B(n),
C(n),
D(n)
Transmit Signalling Bits for Channel n
. When control bit MSN = 0 and RPSIG =
1 this nibble is used. For ESF links these 4 bits are transmitted on the associated
DS1 channel (see table 8) in frames 6, 12, 18 and 24. For D4 links bits A are
transmit on the associated Ds1 channel of frame 6 and bits B are transmit on the
associated DS1 channel of frame 12. For D4 links bits C and D are unused.
Table 73 - T1 / Transmit Channels Usage - CSTi
NOTE: This table illustrates bit mapping on the serial input stream - it does not refer to an internal register.
Page 7 Address:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Equivalent DS1
channel
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Page 8 Address:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Equivalent DS1
channel
17
18
19
20
21
22
23
24
x
x
x
x
x
x
x
x
Table 74 - Pages 7 and 8 Address Mapping to DS1 Channels
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