參數(shù)資料
型號(hào): MT9074
廠商: Mitel Networks Corporation
英文描述: T1/E1/J1 Single Chip Transceiver(T1/E1/J1單片收發(fā)器)
中文描述: T1/E1/J1收發(fā)單芯片收發(fā)器(T1/E1/J1收發(fā)單片收發(fā)器)
文件頁(yè)數(shù): 57/120頁(yè)
文件大?。?/td> 362K
代理商: MT9074
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Advance Information
MT9074
57
Bit
Name
Functional Description
7 - 3
PD4 -
PD0
Peak
These five bits indicate the level of the
received signal AMI pulses.
PD4
PD3
PD2
PD1 PD0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
Detector
Voltage
Levels.
Line Attenuation
less than 4dB
3-8dB
8-14dB
14-20dB
more than 20dB
2
LLOS
LIU Loss of Signal indication
. This
bit will be high when the received
signal is less than 40 dB below the
nominal value for a period of at least 1
msec. This bit will be low for normal
operation.
1-0
- - -
Unused
Table 51 - Receive Signal Status Word
(Page 3, Address 16H) (T1)
Bit
Name
Functional Description
7
TSLIP
Transmit Slip
. A change of state (i.e.
1-to-0 or 0-to-1) indicates that a
transmit controlled frame slip has
occurred.
6
TSLPD
Transmit Slip Direction.
If one,
indicates that the last transmit frame
slip resulted in a repeated frame, i.e.,
the internally generated 1.544 Mhz.
transmit clock is faster than the system
clock (C4b). If zero, indicates that the
last transmit frame slip resulted in a
lost frame, i.e., the internally generated
1.544 Mhz. transmit clock is slower
than network clock. Updated on an
TSLIP occurrence basis.
5
TxSB
MSB
Transmit Slip Buffer MSB
. The most
significant bit of the phase status word.
If one, delay through the transmit
elastic buffer is greater than one frame
in length; if zero, delay through the
receive elastic buffer is less than one
frame in length. Bit is reset whenever
page 3 address 17H - Transmit Slip
Buffer Delay - is written to.
4 - 0
- - -
Unused
.
Table 52 - MSB Transmit Slip Buffer
(Page 3, Address 17H) (T1)
Bit
Name
Functional Description
7 - 3 TxTS4 - 0
Transmit Time Slot
. A five bit
counter that indicates the number
of STBUS time slots between the
transmit elastic buffer STBUS write
frame boundary and the internal
transmit read frame boundary. The
count is updated every 250 uS.
2 - 0 TxBC2 - 0
Transmit Bit Count
. A three bit
counter indicating the number of
STBUS bit times there are between
the transmit elastic buffer STBUS
write frame boundary and the
internal read frame boundary. The
count is updated every 250 uS.
Table 53 - Transmit Slip Buffer Delay
(Page 3, Address 18H) (T1)
Bit
Name
Functional Description
7-0
ID7-0
ID Number.
Contains device code
10101111
Table 54 - Identification Word
(Page 3, Address 1FH) (T1)
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