
377
7682C–AUTO–04/08
AT90CAN32/64/128
Table 27-9.
External Data Memory Characteristics, VCC = 4.5 - 5.5 Volts, SRWn1 = 1, SRWn0 = 0
Symbol
Parameter
8 MHz Oscillator
Variable Oscillator
Unit
Min.
Max.
Min.
Max.
0
1/tCLCL
Oscillator Frequency
0.0
16
MHz
10
tRLDV
Read Low to Data Valid
325
3.0 tCLCL – 50
ns
12
tRLRH
RD Pulse Width
365
3.0 tCLCL – 10
ns
15
tDVWH
Data Valid to WR High
375
3.0 tCLCL
ns
16
tWLWH
WR Pulse Width
365
3.0 tCLCL – 10
ns
Table 27-10. External Data Memory Characteristics, VCC = 4.5 - 5.5 Volts, SRWn1 = 1, SRWn0 = 1
Symbol
Parameter
8 MHz Oscillator
Variable Oscillator
Unit
Min.
Max.
Min.
Max.
0
1/tCLCL
Oscillator Frequency
0.0
16
MHz
10
tRLDV
Read Low to Data Valid
200
3.0 tCLCL – 50
ns
12
tRLRH
RD Pulse Width
365
3.0 tCLCL – 10
ns
14
tWHDX
Data Hold After WR High
240
2.0 tCLCL – 10
ns
15
tDVWH
Data Valid to WR High
375
3.0 tCLCL
ns
16
tWLWH
WR Pulse Width
365
3.0 tCLCL – 10
ns
Table 27-11. External Data Memory Characteristics, VCC = 2.7 - 5.5 Volts, No Wait-state
Symbol
Parameter
4 MHz Oscillator
Variable Oscillator
Unit
Min.
Max.
Min.
Max.
0
1/tCLCL
Oscillator Frequency
0.0
16
MHz
1
tLHLL
ALE Pulse Width
235
tCLCL – 15
ns
2
tAVLL
Address Valid A to ALE Low
115
0.5 tCLCL – 10
ns
3a
tLLAX_ST
Address Hold After ALE Low,
write access
5
ns
3b
tLLAX_LD
Address Hold after ALE Low,
read access
5
ns
4
tAVLLC
Address Valid C to ALE Low
115
0.5 tCLCL – 10
ns
5
tAVRL
Address Valid to RD Low
235
1.0 tCLCL – 15
ns
6
tAVWL
Address Valid to WR Low
235
1.0 tCLCL – 15
ns
7
tLLWL
ALE Low to WR Low
115
130
0.5 tCLCL – 10
0.5 tCLCL + 5
ns
8
tLLRL
ALE Low to RD Low
115
130
0.5 tCLCL – 10
0.5 tCLCL + 5
ns
9
tDVRH
Data Setup to RD High
45
ns
10
tRLDV
Read Low to Data Valid
190
1.0 tCLCL – 60
ns