參數(shù)資料
型號(hào)： MPC8313E-RDBC
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 57/99頁(yè)
文件大小： 0K
描述： BOARD CPU 8313E VER 2.2
標(biāo)準(zhǔn)包裝： 1
系列： PowerQUICC II™ PRO
類型： MPU
適用于相關(guān)產(chǎn)品： MPC8313E
所含物品： 板
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
60
Freescale Semiconductor
This table provides the DC electrical characteristics for the GPIO when the GPIO pins are operating from
a 2.5-V supply.
16.2
GPIO AC Timing Specifications
This table provides the GPIO input and output AC timing specifications.
This figure provides the AC test load for the GPIO.
Figure 52. GPIO AC Test Load
Table 56. GPIO (When Operating at 2.5 V) DC Electrical Characteristics1
Parameters
Symbol
Conditions
Min
Max
Unit
Supply voltage 2.5 V
NVDD
—
2.37
2.63
V
Output high voltage
VOH
IOH = –1.0 mA
NVDD = min
2.00
NVDD + 0.3
V
Output low voltage
VOL
IOL = 1.0 mA
NVDD = min
VSS– 0.3
0.40
V
Input high voltage
VIH
—NVDD = min
1.7
NVDD + 0.3
V
Input low voltage
VIL
—NVDD = min
–0.3
0.70
V
Input high current
IIH
VIN = NVDD
—10
A
Input low current
IIL
VIN = VSS
–15
—
A
Note:
1. This specification only applies to GPIO pins that are operating from a 2.5-V supply. See Table 62 for the power supply listed
for the individual GPIO signal
Table 57. GPIO Input AC Timing Specifications1
Characteristic
Symbol2
Min
Unit
GPIO inputs—minimum pulse width
tPIWID
20
ns
Notes:
1. Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of SYS_CLKIN. Timings
are measured at the pin.
2. GPIO inputs and outputs are asynchronous to any visible clock. GPIO outputs should be synchronized before use by any
external synchronous logic. GPIO inputs are required to be valid for at least tPIWID ns to ensure proper operation.
Output
Z0 = 50
NVDD/2
RL = 50
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