13 I2
參數(shù)資料
型號： MPC8313E-RDBC
廠商： Freescale Semiconductor
文件頁數(shù)： 50/99頁
文件大?。?/td> 0K
描述： BOARD CPU 8313E VER 2.2
標準包裝： 1
系列： PowerQUICC II™ PRO
類型： MPU
適用于相關(guān)產(chǎn)品： MPC8313E
所含物品： 板
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
54
Freescale Semiconductor
13 I2C
This section describes the DC and AC electrical characteristics for the I2C interface.
13.1
I2C DC Electrical Characteristics
This table provides the DC electrical characteristics for the I2C interface.
13.2
I2C AC Electrical Specifications
This table provides the AC timing parameters for the I2C interface.
Table 48. I2C DC Electrical Characteristics
At recommended operating conditions with NVDD of 3.3 V ± 0.3 V.
Parameter
Symbol
Min
Max
Unit
Note
Input high voltage level
VIH
0.7
NV
DD
NVDD + 0.3
V
Input low voltage level
VIL
–0.3
0.3
NV
DD
V
Low level output voltage
VOL
00.2
NV
DD
V1
Output fall time from VIH(min) to VIL(max) with a bus
capacitance from 10 to 400 pF
tI2KLKV
20 + 0.1
C
B
250
ns
2
Pulse width of spikes which must be suppressed by the input
filter
tI2KHKL
050
ns
3
Capacitance for each I/O pin
CI
—10
pF
Input current, (0 V
V
IN NVDD)IIN
—± 5
A4
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. CB = capacitance of one bus line in pF.
3. Refer to the MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, for information on the digital
filter used.
4. I/O pins obstruct the SDA and SCL lines if NVDD is switched off.
Table 49. I2C AC Electrical Specifications
All values refer to VIH (min) and VIL (max) levels (see Table 48).
Parameter
Symbol1
Min
Max
Unit
SCL clock frequency
fI2C
0
400
kHz
Low period of the SCL clock
tI2CL
1.3
—
s
High period of the SCL clock
tI2CH
0.6
—
s
Setup time for a repeated START condition
tI2SVKH
0.6
—
s
Hold time (repeated) START condition (after this period, the first clock
pulse is generated)
tI2SXKL
0.6
—
s
Data setup time
tI2DVKH
100
—
ns
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