參數(shù)資料
型號(hào)： MPC8313E-RDBC
廠商： Freescale Semiconductor
文件頁數(shù)： 5/99頁
文件大小： 0K
描述： BOARD CPU 8313E VER 2.2
標(biāo)準(zhǔn)包裝： 1
系列： PowerQUICC II™ PRO
類型： MPU
適用于相關(guān)產(chǎn)品： MPC8313E
所含物品： 板
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
13
4.2
AC Electrical Characteristics
The primary clock source for the MPC8313E can be one of two inputs, SYS_CLK_IN or PCI_CLK,
depending on whether the device is configured in PCI host or PCI agent mode. This table provides the
system clock input (SYS_CLK_IN/PCI_CLK) AC timing specifications for the MPC8313E.
5
RESET Initialization
This section describes the DC and AC electrical specifications for the reset initialization timing and
electrical requirements of the MPC8313E.
5.1
RESET DC Electrical Characteristics
This table provides the DC electrical characteristics for the RESET pins.
Table 8. SYS_CLK_IN AC Timing Specifications
Parameter/Condition
Symbol
Min
Typ
Max
Unit
Note
SYS_CLK_IN/PCI_CLK frequency
fSYS_CLK_IN
24
—
66.67
MHz
1
SYS_CLK_IN/PCI_CLK cycle time
tSYS_CLK_IN
15
—
ns
—
SYS_CLK_IN rise and fall time
tKH, tKL
0.6
0.8
4
ns
2
PCI_CLK rise and fall time
tPCH, tPCL
0.6
0.8
1.2
ns
2
SYS_CLK_IN/PCI_CLK duty cycle
tKHK/tSYS_CLK_IN
40
—
60
%
3
SYS_CLK_IN/PCI_CLK jitter
—
±150
ps
4, 5
Notes:
1. Caution: The system, core, security block must not exceed their respective maximum or minimum operating frequencies.
2. Rise and fall times for SYS_CLK_IN/PCI_CLK are measured at 0.4 and 2.4 V.
3. Timing is guaranteed by design and characterization.
4. This represents the total input jitter—short term and long term—and is guaranteed by design.
5. The SYS_CLK_IN/PCI_CLK driver’s closed loop jitter bandwidth should be <500 kHz at –20 dB. The bandwidth must be
set low to allow cascade-connected PLL-based devices to track SYS_CLK_IN drivers with the specified jitter.
Table 9. RESET Pins DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Input high voltage
VIH
—2.1
NVDD +0.3
V
Input low voltage
VIL
—–0.3
0.8
V
Input current
IIN
0 V
V
IN NVDD
—±5
A
Output high voltage
VOH
IOH = –8.0 mA
2.4
—
V
Output low voltage
VOL
IOL = 8.0 mA
—
0.5
V
Output low voltage
VOL
IOL = 3.2 mA
—
0.4
V
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