參數(shù)資料
型號: MPC5200ID
廠商: Motorola, Inc.
英文描述: MPC5200 Hardware Specifications
中文描述: MPC5200的硬件規(guī)格
文件頁數(shù): 45/76頁
文件大?。?/td> 1404K
代理商: MPC5200ID
MOTOROLA
MPC5200 Hardware Specifications
45
Electrical and Thermal Characteristics
Figure 32 Timing Diagram — SPI Slave Mode, Format 0 (CPHA = 0)
NOTE:
Output timing was specified at a nominal 50 pF load.
Table 37 Timing Specifications — SPI Master Mode, Format 1 (CPHA = 1)
Sym
Description
Min
Max
Units
SpecID
1
Cycle time
4
1024
IP-Bus
Cycle
1
1
Inter Peripheral Clock is defined in the MPC5200 User Manual [1].
A11.21
2
Clock high or low time
2
512
IP-Bus
Cycle
1
A11.22
3
Slave select clock delay
15.0
ns
A11.23
4
Output data valid
20.0
ns
A11.24
5
Input Data setup time
20.0
ns
A11.25
6
Input Data hold time
20.0
ns
A11.26
7
Slave disable lag time
15.0
ns
A11.27
8
Sequential Transfer delay
1
IP-Bus
Cycle
1
A11.28
9
Clock falling time
7.9
ns
A11.29
10
Clock rising time
7.9
ns
A11.30
SCK
(CLKPOL=0)
SCK
(CLKPOL=1)
MOSI
Input
Input
Input
SS
Input
MISO
Output
1
2
2
9
3
7
4
6
5
8
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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