參數(shù)資料
型號: MPC5200ID
廠商: Motorola, Inc.
英文描述: MPC5200 Hardware Specifications
中文描述: MPC5200的硬件規(guī)格
文件頁數(shù): 19/76頁
文件大?。?/td> 1404K
代理商: MPC5200ID
MOTOROLA
MPC5200 Hardware Specifications
19
Electrical and Thermal Characteristics
3.3.4 External Interrupts
The MPC5200 provides three different kinds of external interrupts:
Four IRQ interrupts
Eight GPIO interrupts with simple interrupt capability (not available in power-down mode)
Eight WakeUp interrupts (special GPIO pins)
The propagation of these three kinds of interrupts to the core is shown in the following graphic:
Figure 4 External interrupt scheme
Due to synchronization, prioritization, and mapping of external interrupt sources, the propagation of
external interrupts to the core processor is delayed by several IP_CLK clock cycles. The following table
specifies the interrupt latencies in IP_CLK cycles. The IP_CLK frequency is programmable in the Clock
Distribution Module (see Note
Table 16
).
Table 16 External interrupt latencies
Interrupt Type
Pin Name
Clock Cycles Reference Clock
Core Interrupt
SpecID
Interrupt Requests
IRQ0
10
IP_CLK
critical (cint)
A4.1
IRQ0
10
IP_CLK
normal (int)
A4.2
IRQ1
10
IP_CLK
normal (int)
A4.3
IRQ2
10
IP_CLK
normal (int)
A4.5
IRQ3
10
IP_CLK
normal (int)
A4.6
8 GPIOs
8 GPIOs
GPIO WakeUp
GPIO Std
IRQ0
IRQ1
IRQ2
IRQ3
PIs
cint
int
Grouper
Encoder
Encoder
Main Interrupt
Controller
core_cint
core_int
G2_LE Core
Notes:
1. PIs = Programmable Inputs
2. Grouper and Encoder functions imply programmability in software
8
8
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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