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參數(shù)資料
| 型號： | ML86V8208 |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 854 X 480 PIXELS DOT MAT LCD DSPL CTLR, PQFP176 |
| 封裝： | 24 X 24 MM, 0.50 MM PITCH, PLASTIC, LQFP-176 |
| 文件頁數(shù)： | 8/31頁 |
| 文件大?。?/td> | 299K |
| 代理商： | ML86V8208 |
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PEDL86V8208-02
OKI Semiconductor
MSL86V8208
16/31
Clock Generation for Display Output
The structure following the subsequent scaler section is classified into the input system and the output system.
The input system performs I/P conversion and external device control (I/P conversion or NR).
The output system performs scaling, color space conversion, contrast adjustment, non-linear conversion by a color
lookup table, on-screen display data generation/composition, and output data format conversion according to the
display device.
The clock of the output system is generated by the built-in PLL based on the integer ratio that was set using the
clock of the input system as the reference.
[Example of Input and Output Clock Frequency Combination]
Output clock frequency (frequency ratio)
Input format
Input clock
frequency
VGA
640
× 480
Wide-VGA
800
× 480
Wide-VGA
854
× 480
Remarks
24.0 MHz
(16/9)
—
Full-screen display of standard image
—
30.0 MHz
(20/9)
30.0 MHz
(20/6)
Full-screen display of squeezed image
720
× 240, 60i
(NTSC or D1)
13.5 MHz
—
40.0 MHz
(80/27)
42.6 MHz
(60/19)
Full-screen display of letter box image
20.0 MHz
(40/27)
—
Full-screen display of standard image
—
25.0 MHz
(50/27)
26.7 MHz
(81/41)
Full-screen display of squeezed image
720
× 288, 50i
(PAL or SECAM)
13.5 MHz
—
33.2 MHz
(32/13)
35.6 MHz
(29/11)
Full-screen display of letter box image
800
× 480, 60p
(digital input)
30.0 MHz
—
30.0 MHz
(1/1)
32.0 MHz
(16/15)
Full-screen display of wide image
Note 1: The values in the table are for the guideline only. Adjust the values according to the display panel that is
used.
Divide ratio
Input clock
divider
VCLK
Divide ratio
Output clock
divider
ECLK
PLLSEL1
HOLD
Output clock
Oscillation
range
VCO
Pre
P
F
C
Divide ratio
Analog/
digital selection
HPLL clock
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|---|---|
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| ML87V3116 | DOT MAT LCD DSPL CTLR, PQFP176 |
| ML87V3116 | DOT MAT LCD DSPL CTLR, PQFP176 |
| ML9041-XXACVWA | 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ML86V8208TCZ03A | 制造商:ROHM Semiconductor 功能描述:DECONV : DECODER (3CH) + SCALE |
| ML86V8208TPZ03A-7 | 制造商:ROHM Semiconductor 功能描述: |
| ML86V8208TPZ30A-7 | 制造商:ROHM Semiconductor 功能描述: |
| ML86V8209TCZ03A | 制造商:ROHM Semiconductor 功能描述: |
| ML86V8209TCZ03A-7 | 制造商:ROHM Semiconductor 功能描述:LCD CONTROLLER WITH VIDEO DECO |
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