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參數資料
| 型號： | ML86V8208 |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 854 X 480 PIXELS DOT MAT LCD DSPL CTLR, PQFP176 |
| 封裝： | 24 X 24 MM, 0.50 MM PITCH, PLASTIC, LQFP-176 |
| 文件頁數： | 29/31頁 |
| 文件大小： | 299K |
| 代理商： | ML86V8208 |
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PEDL86V8208-02
OKI Semiconductor
MSL86V8208
7/31
Type
Pin No.
Pin name
I/O
Input
Output
Function
89
DVSSC
Power supply
Ground for logic core
90
RCS
O
4 mA drive
External ROM chip select
91
RSCK
O
4 mA drive
External ROM serial clock
92
DVDDC
Power supply
Power supply for logic core
93
FYI7
I
LVTTL
External IP/NR read data Y7
94
FYI6
I
LVTTL
External IP/NR read data Y6
95
FYI5
I
LVTTL
External IP/NR read data Y5
96
FYI4
I
LVTTL
External IP/NR read data Y4
97
FYI3
I
LVTTL
External IP/NR read data Y3
98
FYI2
I
LVTTL
External IP/NR read data Y2
99
FYI1
I
LVTTL
External IP/NR read data Y1
100
FYI0
I
LVTTL
External IP/NR read data Y0
101
DVSSC
Power supply
Ground for logic core
102
FCI7
I
LVTTL
External IP/NR read data C7
103
FCI6
I
LVTTL
External IP/NR read data C6
104
FCI5
I
LVTTL
External IP/NR read data C5
105
FCI4
I
LVTTL
External IP/NR read data C4
106
FCI3
I
LVTTL
External IP/NR read data C3
107
FCI2
I
LVTTL
External IP/NR read data C2
108
FCI1
I
LVTTL
External IP/NR read data C1
109
FCI0
I
LVTTL
External IP/NR read data C0
110
DVDDC
Power supply
Power supply for logic core
111
FDEI
I
LVTTL
External IP/NR read data enable
112
FVSI
I
LVTTL Schmitt
External IP/NR read vertical sync signal
113
FHSI
I
LVTTL Schmitt
External IP/NR read horizontal sync signal
114
DVSSIO
Power supply
Ground for output
115
FCKO
O
4 mA drive
External IP/NR clock output
116
FDO0
O
4 mA drive
External IP/NR write data 0
117
FDO1
O
4 mA drive
External IP/NR write data 1
118
FDO2
O
4 mA drive
External IP/NR write data 2
119
FDO3
O
4 mA drive
External IP/NR write data 3
120
DVDDIO
Power supply
Power supply for output
121
FDO4
O
4 mA drive
External IP/NR write data 4
122
FDO5
O
4 mA drive
External IP/NR write data 5
123
FDO6
O
4 mA drive
External IP/NR write data 6
124
FDO7
O
4 mA drive
External IP/NR write data 7
125
TOUT
O
4 mA drive
Output for testing (open)
126
SCAN
I
LVTTL pull-down
Input for testing (normally open or fixed to “L”)
127
PLLSEL0
I
LVTTL
HPLL clock select, “L”: Fixed clock / ”H”: PLL
128
PLLSEL1
I
LVTTL
Selection of clock for display circuits,
L”: PLL / ”H”: ECLK input
129
PVDDS
Power supply
Power supply for display PLL
130
ECLK
I
LVTTL
External clock for display circuits
131
HOLD
I
LVTTL
PLL oscillation hold for display circuits
132
PGNDS
Power supply
Ground for display PLL
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