參數(shù)資料
型號(hào)： MK68564
廠商： 意法半導(dǎo)體
英文描述： Serial Input Output(串行I/O(雙通道,多功能外圍電路))
中文描述： 串行輸入輸出（串行的I / O（雙通道，多功能外圍電路））
文件頁數(shù)： 23/46頁
文件大?。?/td> 464K
代理商： MK68564
outputpinaslongasnodataisloaded intothetrans-
mit buffer.
Note: If a character is loaded into the transmit buf-
fer before enabling the transmitter, that character
willbe sent in place of a flag.
An abort sequence may be transmitted at any time
by issuing the Send Abort command (command 1).
This causes at least eight, but less than fourteen,
ones to be sent before the output reverts back to
continuous flags. It is possible that the Abort se-
quence (eight 1’s) could follow up to fivecontinuous
ones (allowed by thezero insertion logic)and, thus,
causeasmany asthirteen onestobesent.Anydata
beingtransmitted andanydatainthe transmitbuffer
is lost when an abort is issued.
The zero insertion logic in the transmitter will auto-
matically insert a 0 after five continuous ones in the
data stream.This does not apply to flagsor aborts.
Start of Transmission
. Transmission will begin
withtheloading ofthefirstcharacterintothetransmit
bufferifthe transmitter isalready enabled. For CRC
to be calculated correctly on each frame, the CRC
generator must be initialized to all ones before the
firstcharacter is loaded.Thisis accomplished by is-
suing a Reset TxCRC Generator command in the
Command Register. The first non-flag character
transmitted is the address field. The SIO does not
automatically transmit a station address, this is left
to the programmer. The SIO will only transmit flags
and CRC characters automatically.
SDLCTransmitCharacteristics
.AnylengthSDLC
frame can be transmitted. All characters are trans-
mitted with the least-significant bits first. All data is
shifted outof the Transmit Data pin(TxD) onthefal-
lingedge of theTransmit Clock (TxC). The transmit-
tertransmit fromoneto eightdatabitspercharacter.
This requires right-hand justification of data written
to the transmit buffer, if the word lengthselected is
less than eight bits per character. When the pro-
grammed character length is six or seven bits, the
unused bits in the transmit buffer are ignored. If a
word length of five bits per character or less is se-
lected, the data loaded into the transmit buffermust
be formatted as described in the Transmit Control
Register part of the Register Description section.
The number of bits per character to be transmitted
can be changed on the fly. Any data,written to the
transmit buffer after the bits per character field is
changed, are affected by the change. The same is
true of any characters in the buffer at the time the
bits per character field is changed. The change in
the number of bits per character does not affect the
character in the process of being shifted out. Flag
characters are always eigth bits inlength, and CRC
is always 16 bits in length, regardless of the pro-
grammed bits per character. A transmitted frame
canbeterminated byCRC and a flag, by a flagonly,
or by an abort. This is controlled by the Tx Under-
run/EOM Latch and the Send Abort command.
Data Transfers
. A Transmit Interrupt is generated
each time the transmit buffer becomes empty. The
interrupt may be satisfied either by writing another
character into the transmit buffer or by resetting the
Transmit Interrupt Pending latch with aReset TxIn-
terrupt Pending command.Ifthe interrupt issatisfied
with this command, and nothing more iswritten into
the transmit buffer, there are no further transmitter
interrupts, and a Transmit Underrun condition will
occur when the data in the shift register is shifted
out.When another character is writtento thebuffer
and loaded into the shift register, thetransmit buffer
can again become empty and interrupt the CPU.
Following the flags in an SDLC operation, the 8-bit
address field,control field,and information fieldmay
be sent to the SIO, using the Transmit Interrupt
mode.The SIOtransmitsthe frame checksequence
using the Transmit Underrun feature.
When the transmitter is first enabled, the transmit
buffer is already empty and obviously cannot then
become empty.Therefore, no transmit interrupt can
occur until after thefirst data character is written to
the transmit buffer.
Another way of detecting when the transmitter re-
quires serviceistopolltheTxBufferEmptybitinSta-
tus Register 0. This bit is set to a one every timethe
data in the transmit buffer is downloaded into the
transmit shift register. When data is written to the
transmit buffer, this bit is reset to zero.
The SIO has allthe signals and controls necessary
to implement a DMA transfer routine for the trans-
mitter. The routine may be configured to enable the
DMAcontroller, afterthefirstcharacter iswritteninto
the transmit buffer, using the TxRDY output pin to
signaltheDMAthat thetransmitterrequires service.
TheDMAtransfercan beterminated, whenthe DMA
blockcount isreached, using theTxUnderrun/EOM
interrupt.
Transmit Underrun/End of Message
. SDLC-like
protocols do not have provisions for fill characters
withina message.The SIO,therefore, automatically
terminates an SDLC frame when the transmitdata
buffer is empty, and the output shift register has no
MK68564
23/46
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