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參數(shù)資料
| 型號： | MK50H28Q25/XX |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 32/64頁 |
| 文件大?。?/td> | 429K |
| 代理商： | MK50H28Q25/XX |
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4.2.9 Priority DLCI Block
The Priority DLCI Block (PDB) is a mechanism through which the host can demand the MK50H28 to im-
mediately service certain desired DLCIs. The host should first set up entries in the PDB before setting
the PTDMD bit in CSR2. In response to that, the MK50H28, after completing transmission service of its
current DLCI, will jump to the PDB rather than advancing to the next entry in the Context Table. After
servicing all active entries in the PDB, the MK50H28 will return to the Context Table and resume the
transmission service that was in progress before it was interrupted. (NOTE: A maximum of 256 entries
are allowed in the PDB.) The following is the format of the Priority DLCI Block.
1
5
1
4
1
3
0
7
0
8
0
1
2
0
1
0
2
0
3
0
4
0
5
0
9
0
6
0
Index to Context Table
0
Index to Context Table
MSB
LSB
0
Index to Context Table
A
C
T
V
E
A
C
T
V
E
A
C
T
V
E
IADR + 96
IADR + 98
IADR + XX
E
O
P
C
H
(0)
E
O
P
C
H
(0)
E
O
P
C
H
(1)
4.3 Receive and Transmit Descriptor Rings
Each active channel has an associated transmit and receive ring (Figure 3). Each ring can have a maxi-
mum of 128 descriptors, and each descriptor in the ring is a 4 word entry. Each ring is terminated by set-
ting the EOR bit in the last descriptor. Except for the first word (see below for RMD0 or TMD0), all the
descriptors are identical for both LMI and non-LMI channels. NOTE: The Buffer Byte Count (BMCT) for
LMI channels should be greater than 14 bytes. The following is the format of the receive and transmit de-
scriptors.
BIT
NAME
DESCRIPTION
15
Index to CT
13-bit index into Context Table
02
0
Reserved. Must be written as zeros.
01
EOPCH
End of PDB. Setting this bit to 1 indicates that this is the last entry in the PDB
00
ACTIVE
This bit is set by the host if the corresponding index into the Context Table is active. The
MK50H28 ignores the entry if this bit is not set.
MK50H28
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