參數(shù)資料
型號(hào): MK50H28Q25/XX
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁(yè)數(shù): 10/64頁(yè)
文件大小: 429K
代理商: MK50H28Q25/XX
CSR
DATA
1
5
1
0
1
4
0
9
1
2
1
0
8
0
3
0
7
0
2
0
6
0
5
0
4
0
1
0
1
3
4.1.1.2 Register Data Port (RDP)
BIT
NAME
DESCRIPTION
15:00
CSR DATA
Writing data to the RDP loads data into the CSR selected by RAP. Reading the data from
RDP reads the data from the CSR selected in RAP.
1
5
1
4
1
3
0
7
0
8
1
0
1
2
0
1
0
2
0
3
0
4
0
5
0
9
0
6
0
R
I
N
T
I
N
T
P
I
N
T
U
R
M
I
S
M
E
R
O
R
I
N
T
R
X
O
N
T
X
O
N
I
N
E
A
S
T
O
P
D
T
X
D
R
X
P
T
D
M
D
4.1.2 Control and Status Register Definition
4.1.2.1 Control and Status Register 0 (CSR0)
RAP<3:1> = 0
BIT
NAME
DESCRIPTION
15
PTDMD
Transmit Demand for Priority DLCIs. Setting this bit to 1 causes the MK50H28 to jump to
Priority DLCI Block (PDB). This bit is cleared by the MK50H28 after servicing all active
entries in the PDB. (Note: See section 4.2.9 for more details.)
14
STOP
STOP, when set, indicates that MK50H28 is operating in the STOPPED Phase of
operation. All external activity is disabled and internal logic is reset. MK50H28 remains
inactive except for primitive processing until a START primitive is issued. STOP IS READ
ONLY and set by Bus RESET or a STOP primitive. Writing to this bit has no effect.
13
DTX
Disable Transmitter. Prevents the MK50H28 from further access to the Transmitter
Descriptor Rings. No transmissions are attempted after finishing transmission of any
frame in transmission at the time of DTX being set. Even LMI frames normally generated
automatically will not be transmitted if DTX=1. TXON acknowledges changes to DTX,
see below. DTX is READ/WRITE.
12
DRX
Disable the Receiver prevents the MK50H28 from further access to the Receiver
Descriptor Rings. No received frames are accepted after finishing reception of any frame
in reception at the time of DRX being set. Setting DRX will put the MK50H28 in the
LOCAL BUSY Phase. RXON acknowledges changes to DRX, see description of RXON.
DRX is READ/WRITE.
MK50H28
18/64
相關(guān)PDF資料
PDF描述
MK50N512CLL100R 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
MK50X256CLL100 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
MK50N512CLL100 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
ML53812-2 SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176
ML54051 FLASH MEMORY DRIVE CONTROLLER, PQFP120
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MK50H28TQ25 功能描述:電信集成電路 MLL Controller 25MHz RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
MK50N512CLL100 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
MK50N512CLQ100 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
MK50N512CMC100 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
MK50N512CMD100 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz