參數(shù)資料
型號(hào)： MFRC52301HN1
廠商： NXP Semiconductors N.V.
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Contactless reader IC
封裝： MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁(yè)數(shù)： 80/98頁(yè)
文件大?。?/td> 1666K
代理商： MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
80 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
16. Test information
16.1 Test signals
16.1.1
Self-test
The MFRC523 has the capability to perform a digital self-test. The self-test is started by
using the following procedure:
1. Perform a soft reset.
2. Clear the internal buffer by writing 25 bytes of 00h and implement the Config
command.
3. Enable the self-test by writing 09h to the AutoTestReg register.
4. Write 00h to the FIFO buffer.
5. Start the self-test with the CalcCRC command.
6. The self-test is initiated.
7. When the self-test has completed, the FIFO buffer contains the following 64 bytes:
FIFO buffer byte values for version B2h:
0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95, 0xD0, 0xE3, 0x0D, 0x3D, 0x27, 0x89,
0x5C, 0xDE, 0x9D, 0x3B, 0xA7, 0x00, 0x21, 0x5B, 0x89, 0x82, 0x51, 0x3A, 0xEB,
0x02, 0x0C, 0xA5, 0x00, 0x49, 0x7C, 0x84, 0x4D, 0xB3, 0xCC, 0xD2, 0x1B, 0x81,
0x5D, 0x48, 0x76, 0xD5, 0x71, 0x61, 0x21, 0xA9, 0x86, 0x96, 0x83, 0x38, 0xCF,
0x9D, 0x5B, 0x6D, 0xDC, 0x15, 0xBA, 0x3E, 0x7D, 0x95, 0x3B, 0x2F
16.1.2
Test bus
The test bus is used for production tests. The following configuration can be used to
improve the design of a system using the MFRC523. The test bus allows internal signals
to be routed to the digital interface. The test bus comprises two sets of test signals which
are selected using their subaddress specified in the TestSel2Reg register’s
TestBusSel[4:0] bits. The test signals and their related digital output pins are described in
Table 157
and
Table 158
.
Table 157. Test bus signals: TestBusSel[4:0] = 07h
Pins
Internal
signal name
D6
s_data
D5
s_coll
D4
s_valid
D3
s_over
D2
RCV_reset
D1
-
Description
received data stream
bit-collision detected (106 kBd only)
s_data and s_coll signals are valid
receiver has detected a stop condition
receiver is reset
reserved
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