參數(shù)資料
型號(hào)： MFRC52301HN1
廠商： NXP Semiconductors N.V.
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： Contactless reader IC
封裝： MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁(yè)數(shù)： 58/98頁(yè)
文件大?。?/td> 1666K
代理商： MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
58 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
9.2.3.8
CWGsPReg register
Defines the conductance of the p-driver output during periods of no modulation.
Table 102. CWGsPReg register (address 28h); reset value: 20h bit allocation
Bit
7
6
5
Symbol
reserved
Access
-
Table 103. CWGsPReg register bit descriptions
Bit
Symbol
7 to 6
reserved
5 to 0
CWGsP[5:0]
9.2.3.9
ModGsPReg register
Defines the conductance of the p-driver output during modulation.
Table 104. ModGsPReg register (address 29h); reset value: 20h bit allocation
Bit
7
6
5
Symbol
reserved
Table 105. ModGsPReg register bit descriptions
Bit
Symbol
7 to 6
reserved
5 to 0
ModGsP[5:0]
9.2.3.10
TModeReg and TPrescalerReg registers
These registers define the timer settings.
Remark:
The TPrescaler setting higher 4 bits are in the TModeReg register and the lower
8 bits are in the TPrescalerReg register.
Table 106. TModeReg register (address 2Ah); reset value: 00h bit allocation
Bit
7
6
5
Symbol
TAuto
TGated[1:0]
Access
R/W
R/W
4
3
CWGsP[5:0]
R/W
2
1
0
Description
reserved for future use
defines the conductance of the p-driver output which can be used to
regulate the output power and subsequently current consumption and
operating distance
during Soft power-down mode the highest bit is forced to logic 1
Remark:
the conductance value is binary weighted
4
3
ModGsP[5:0]
2
1
0
Access
-
R/W
Description
reserved for future use
defines the conductance of the p-driver output during modulation
which can be used to regulate the modulation index. If the TxASKReg
register’s Force100ASK bit is set to logic 1 the value of ModGsP has
no effect
during Soft power-down mode the highest bit is forced to logic 1
Remark:
the conductance value is binary weighted
4
3
2
1
0
TAutoRestart
R/W
TPrescaler_Hi[3:0]
R/W
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