參數(shù)資料
型號(hào): MDS212CG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類(lèi): 網(wǎng)絡(luò)接口
英文描述: 12-Port 10/100Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA456
封裝: 35 X 35 MM, 2.33 MM HEIGHT, MS-034, HSBGA-456
文件頁(yè)數(shù): 84/111頁(yè)
文件大小: 1609K
代理商: MDS212CG
MDS212
Data Sheet
84
Zarlink Semiconductor Inc.
18.2.9.1 AMIIC - MII Command Register
This is a write-only register. The upper layer services write the management frame to be sent to the PHYs into this
register. The MSB (bit 31) is the first bit sent over the serial interface.
Access:
Address:
Non-Zero-Wait-State,
h654
Direct Access,
Write only
Bit [31:30]
Bit [29:28]
ST
OP
Start of frame – always = “01”
Operation code – “10” for read command and “01” for write
command
5-bit PHY Address
5-bit Register Address in PHY
Turnaround – “10” for write
16-bit Write Data to PHY
Bit [27:23]
Bit [22:18]
Bit [17:16]
Bit [15:0]
PHY_AD
REG_AD
TA
DATA
18.2.9.2 AMIIS - MII Status Register
The upper layer services should read this register for data sent by the PHYs. The lower 16 bits contain data
received by the Management Module
Access:
Address:
Non-Zero-Wait-State,
h658
Direct Access,
Read only
Bit [31]
Bit [30]
Bit [15:0]
RDY
VALID
DATA
Data Ready
Data Valid
16-bit Read Data from PHY
31 30
20 28
27
23
22
18
17 16
15
2 1 0
ST
OP
PHY_AD
REG_AD
TA
DATA (16-bit)
31
30
29
16
15
2 1 0
RY
VD
DATA (16-bit)
Bit [31] RDY
Bit [30] VALID
Description
1
1
Data field contains valid data from the PHYs.
1
0
Data field contains invalid data from the PHYs.
0
X
Data field is not ready to be read by Switch Manager CPU.
Table 13 - AMIIS - MII Status Register
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