參數(shù)資料
型號(hào)： MDS212CG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： 12-Port 10/100Mbps Ethernet Switch
中文描述： DATACOM, LAN SWITCHING CIRCUIT, PBGA456
封裝： 35 X 35 MM, 2.33 MM HEIGHT, MS-034, HSBGA-456
文件頁(yè)數(shù)： 38/111頁(yè)
文件大?。?/td> 1609K
代理商： MDS212CG
MDS212
Data Sheet
38
Zarlink Semiconductor Inc.
Table 4 - Summary Description of the Source and Target End Signals
The Flow Control signal (X_FC) monitors the state of the receiving queue at the target end to prevent XPipe
message loss. When the target end does not have enough space to accommodate an entire XPipe message, the
target device sends a XOFF signal by driving the X_FCO signal to LOW. The source device will stop further
transmission until the X_FCI signal asserts the XON state, which is an active HIGH (See Table 4).
The XPipe Message Header provides the payload size, type of message, routing information, and control
information for the XPipe incoming message. The routing information includes the device ID and port ID. The
header size is dependent upon the message types and may be 2 to 4 words in length.
Figure 8 - XPipe Message Header
8.2 XPipe Timing
The source device generates the X_CLKO signal to provide a synchronous transmit data clock. The Receiver will
then sample the data on the falling (negative) edge of the clock, as shown in Figure 9.
To identify the boundary between the XPipe messages and the data stream, the source device uses the X_DEN
signal to envelop the entire XPipe message. That is, a rising (positive) edge at the beginning of the first double word
(4 bytes) and a falling (negative) edge at the beginning of the last double word of an XPipe message as shown in
Figure 9.
Note:
The negative edge does not occur at the end of the last double word, but instead, at the beginning of the last
double word. This allows XPipe messages to be sent consecutively (back-to-back).
Signal Name
Description
Source End
Target End
X_DO[31:0]
X_DI[31:0]
32-bit-wide Transmit Data Bus - Includes an XPipe Message
Header and followed by the data payload.
X_DCLKO
X_DCLKI
Transmit Clock - Synchronous data clock provided by the source
end.
X_DENO
X_DENI
Transmit Data Enable - Provided by the source end to envelop the
entire XPipe message.
X_FCI
X_FCO
Flow Control Signal - A flow control pin from the target end to
signal the source end to active XON/XOFF.
2-4 Words Header
0-64 Words Payload
XpipeFlow Message Header
Data Payload
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