參數(shù)資料
型號(hào): MDS212CG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: 12-Port 10/100Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA456
封裝: 35 X 35 MM, 2.33 MM HEIGHT, MS-034, HSBGA-456
文件頁(yè)數(shù): 21/111頁(yè)
文件大小: 1609K
代理商: MDS212CG
MDS212
Data Sheet
21
Zarlink Semiconductor Inc.
Note:
# = Active low signal
Input = Input signal
In-ST = Input signal with Schmitt-Trigger
Output = Output signal (Tri-State driver)
Out-OD = Output signal with Open-Drain driver
I/O-TS = Input & Output signal with Tri-State driver
I/O-OD = Input & Output signal with Open-Drain driver
U = Internal weak pull-up
TS = Tri-state
ST = Schmitt trigger
E7, E11, E16, E20,
G22, L22, T22, Y22,
AB20, AB16, AB11,
AB7, Y5, T5, L5, G5
VCC
Power
+3.3 Volt DC Supply
E5, E13, E22, L11,
L12, L13, L14, L15,
L16, M11, M12, M13,
M14, M15, M16, N11,
N12, N13, N14, N15,
N16, P11, P12, P13,
P14, P15, P16, R11,
R12, R13, R14, R15,
R16, T11, T12, T13,
T14, T15, T16, AB5,
AB14, AB22
VSS
Power
Ground
Ground
C1, C1
AVDD[1:0]
Analog
Power
Used for the PLL
A1, A1
AVSS[1:0]
Analog
Ground
Used for the PLL
BOOTSTRAP PINS
P23
BS_BMOD
Input
CPU Bus mode
MUST BE SET TO 0
R26
BS_RW
Input
CPU Read/Write Control Polarity Selection Default=1
0=R/W#; 1=W/R#
R25
BS_SWM
Input
Switch mode: Default=1
0=Managed mode 1= Unmanaged
R24
BS_PSD
Input
Primary Device Enable Pin Default=1
0=Secondary 1=Primary
R23
BS_RDYOP
Input
Option of merge the P_RDY# and P_BRDY# as one
pin Default=1
0=Merged pin 1=Separated pins
Frame Buffer Interface (continued)
Ball No(s)
Symbol
I/O
Description
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