參數(shù)資料
型號(hào)： MCR705JP7CDWE
廠商： Freescale Semiconductor
文件頁數(shù)： 146/164頁
文件大小： 0K
描述： MCU 8BIT 224B RAM 28-SOIC
標(biāo)準(zhǔn)包裝： 26
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設(shè)備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 22
程序存儲(chǔ)器容量： 6KB（6K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 224 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
包裝： 管件
Analog Subsystem
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
82
Freescale Semiconductor
these bits and the ISEN bit are cleared when the device is reset, the MC68HC705JJ7/MC68HC705JP7
starts with the charge and discharge function disabled.
The length of time required to reach the maximum voltage to be measured and the speed of the time
counting mechanism will determine the resolution of the reading. The time to ramp the external capacitor
voltage to match the maximum voltage is dependent on:
Charging current to external capacitor
Value of the external capacitor
Clock rate for timing function
Any prescaling of the clock to the timing function
Desired resolution
The charging behavior is described by the general equation:
tCHG = CEXT x VX / ICHG
Where:
tCHG= Charge time (seconds)
CEXT= Capacitance (F)
VX= Unknown voltage (volts)
ICHG= Charge current (A)
Since the MCU can measure time in a variety of ways, the resolution of the conversion will depend on the
length of the time keeping function and its prescaling to the oscillator frequency (fOSC). Therefore, the
charge time also equals:
tCHG = P x N / fOSC
Where:
P= Prescaler value (
÷ 2, ÷ 4, ÷ 8, etc.)
N= Number of counts during charge time
fOSC= Oscillator clock frequency (Hz)
NOTE
Noise on the system ground or the external ramping capacitor can cause
the comparator to trip prematurely. Therefore, in any given application it is
best to use the fastest possible ramp rate (shortest charge time).
The previous two equations for the charge time, tCHG, can be combined to form the following expression
for the full scale count (NFS) of the measured time versus the full scale unknown voltage (VFS):
NFS = CEXT x VFS x fOSC / (P x ICHG)
Since a given timing method has a fixed charge current and prescaler, then the variation in the resultant
count for a given unknown voltage is mainly dependent on the operating frequency and the capacitance
value used. The desired external capacitance for a given voltage range, fOSC, conversion method, and
resolution is defined as:
CEXT = NFS x P x ICHG / (VFS x fOSC)
NOTE
The value of any capacitor connected directly to the PB0/AN0 pin should be
limited to less than 2 microfarads. Larger capacitances will create high
discharge currents which may damage the device or create signal noise.
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